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CPC7691BATR Datasheet(PDF) 11 Page - Clare, Inc. |
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CPC7691BATR Datasheet(HTML) 11 Page - Clare, Inc. |
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11 / 17 page  CPC7691 R00E PRELIMINARY 11 2.2.2 Hot Plug and Power Up Circuit Design Considerations There are six possible start up scenarios that can occur during power up. They are: 1. All inputs defined at power up & LATCH = 0 2. All inputs defined at power up & LATCH = 1 3. All inputs defined at power up & LATCH = Z 4. All inputs not defined at power up & LATCH = 0 5. All inputs not defined at power up & LATCH = 1 6. All inputs not defined at power up & LATCH = Z Under all of the start up situations listed above the CPC7691 will hold all of it’s switches in the all-off state during power up. When VDD requirements have been satisfied the LCAS will complete it’s start up procedure in one of three conditions. For start up scenario 1 the CPC7691 will transition from the all-off state to the state defined by the inputs when VDD is valid. For start up scenarios 2, 3, 5, and 6 the CPC7691 will power up in the all-off state and remain there until the LATCH pin is pulled low. This allows for an indefinite all-off state for boards inserted into a powered system but are not configured for service or boards that need to wait for other devices to be configured first. Start up scenario 4 will start up with all switches in the all-off state but upon the acceptance of a valid VDD the LCAS will revert to either the talk state or the ringing state and there after may randomly change states based on input pin leakage currents and loading. Because the LCAS state after power up can not be predicted with this start up condition it should never be utilized. On designs that do not wish to individually control the LATCH pins of multiple-port cards it is possible to bus many (or all) of the LATCH pins together to create a single board level input enable control. 2.3 Switch Logic 2.3.1 Start-up The CPC7691 uses smart logic to monitor the VDD supply. Any time the VDD is below an internally set threshold, the smart logic places the control logic to the all-off state. An internal pullup on the LATCH pin locks the CPC7691 in the all-off state following start-up until the LATCH pin is pulled down to a logic low. Prior to the assertion of a logic low at the LATCH pin, the switch control inputs must be properly conditioned. 2.3.2 Switch Timing The CPC7691 provides, when switching from the ringing state to the talk state, the ability to control the release timing of the ringing switches SW3 and SW4 relative to the state of the break switches SW1 and SW2 using simple TTL logic-level inputs. The two available techniques are referred to as make-before-break and break-before-make operation. When the switch contacts of SW1 and SW2 are closed (made) before the ringing switch contacts of SW3 and SW4 are opened (broken), this is referred to as make-before-break operation. Break-before-make operation occurs when the ringing contacts of SW3 and SW4 are opened (broken) before the switch contacts of SW1 and SW2 are closed (made). With the CPC7691, make-before-break and break-before-make operations can easily be accomplished by applying the proper sequence of TTL logic-level inputs to the device. 2.3.3 Make-Before-Break Operation To use make-before-break operation, change the logic inputs from the ringing state directly to the talk state. Application of the talk state opens the ringing return switch, SW3, as the break switches SW1 and SW2 close. The ringing switch, SW4, remains closed until the next zero-crossing of the ringing current. While in the make-before-break state, ringing potentials in excess of the CPC7691 protection circuitry thresholds will be diverted away from the SLIC. This operational sequence is shown below in the “Make-Before-Break Ringing to Talk Transition Logic Sequence” on page 12. |
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