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AT91RM9200-CJ-002 Datasheet(PDF) 31 Page - ATMEL Corporation

Part # AT91RM9200-CJ-002
Description  ARM920T-based Microcontroller
Download  701 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT91RM9200-CJ-002 Datasheet(HTML) 31 Page - ATMEL Corporation

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1768I–ATARM–09-Jul-09
AT91RM9200
– MSB- or LSB-first
– Optional break generation and detection
– By 8 or by-16 over-sampling receiver frequency
– Optional hardware handshaking RTS-CTS
– Optional modem signal management DTR-DSR-DCD-RI
– Receiver time-out and transmitter timeguard
– Optional Multi-drop Mode with address generation and detection
• RS485 with driver control signal
• ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards
– NACK handling, error counter with repetition and iteration limit
• IrDA modulation and demodulation
– Communication at up to 115.2 Kbps
• Test Modes
– Remote Loopback, Local Loopback, Automatic Echo
• Connection of two Peripheral DMA Controller (PDC) channels
– Offers buffer transfer without processor intervention
The USART describes features allowing management of the Modem Signals DTR, DSR, DCD
and RI. For details, see “Modem Mode” on page 434.
In the AT91RM9200, only the USART1 implements these signals, named DTR1, DSR1, DCD1
and RI1.
The USART0, USART2 and USART3 do not implement all the modem signals. Only RTS and
CTS (RTS0 and CTS0, RTS2 and CTS2, RTS3 and CTS3, respectively) are implemented in
these USARTs for other features.
Thus, programming the USART0, USART2 or the USART3 in Modem Mode may lead to unpre-
dictable results. In these USARTs, the commands relating to the Modem Mode have no effect
and the status bits relating the status of the modem signals are never activated.
10.17 Serial Synchronous Controller
• Provides serial synchronous communication links used in audio and telecom applications
• Contains an independent receiver and transmitter and a common clock divider
• Interfaced with two PDC channels to reduce processor overhead
• Offers a configurable frame sync and data length
• Receiver and transmitter can be programmed to start automatically or on detection of
different event on the frame sync signal
• Receiver and transmitter include a data signal, a clock signal and a frame synchronization
signal
10.18 Timer Counter
• Three 16-bit Timer Counter Channels
• Wide range of functions including:
– Frequency Measurement
– Event Counting


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