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AT91RM9200-CJ-002 Datasheet(PDF) 48 Page - ATMEL Corporation

Part # AT91RM9200-CJ-002
Description  ARM920T-based Microcontroller
Download  701 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT91RM9200-CJ-002 Datasheet(HTML) 48 Page - ATMEL Corporation

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1768I–ATARM–09-Jul-09
AT91RM9200
11.7.2
CP15 Register 1, Control
Access: Read/Write
The CP15 Register 1, or Control Register, contains the control bits of the ARM920T.
• M[0]: MMU Enable
0 = MMU disabled.
1 = MMU enabled.
• A[1]: Alignment Fault Enable
0 = Fault checking disabled.
1 = Fault checking enabled.
• C[2]: DCache Enable
0 = DCache disabled.
1 = DCache enabled.
• B[7]: Endianness
0 = Little endian mode.
1 = Big endian mode.
• S[8]: System Protection
Modifies the MMU protection system.
For further details, see the ARM920T Technical Reference Manual, Rev. DDI0151C.
• R[9]: ROM Protection
Modifies the MMU protection system.
For further details, see the ARM920T Technical Reference Manual, Rev. DDI0151C.
• I[12]: ICache Control
0 = ICache disabled.
1 = ICache enabled.
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nF
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--------
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0
0
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543210
B
1111
C
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