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9248yF-50-T Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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9248yF-50-T Datasheet(HTML) 1 Page - Integrated Circuit Systems |
1 / 10 page Integrated Circuit Systems, Inc. General Description Features ICS9248-50 0278I—06/03/03 Block Diagram Frequency Timing Generator for Pentium II Systems Pin Configuration • Generates the following system clocks: - 2 CPU (2.5V) up to 100MHz. - 6 PCI (3.3V) @ 33.3MHz (Includes one free running). - 2 REF clks (3.3V) at 14.318MHz. • Skew characteristics: - CPU – CPU<175ps - PCI – PCI < 500ps - CPU(early) – PCI = 1.5ns – 4ns. • Supports Spread Spectrum modulation for CPU and PCI clocks, 0.5% down spread • Efficient Power management scheme through stop clocks and power down modes. • Uses external 14.318MHz crystal, no external load cap required for CL=18pF crystal. • 28-pin (209 mil) SSOP package The ICS9248-50 ICS9248-50 Power Groups 28-Pin SSOP |
Similar Part No. - 9248yF-50-T |
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Similar Description - 9248yF-50-T |
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