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R5F363B6DFE Datasheet(PDF) 8 Page - Renesas Technology Corp |
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R5F363B6DFE Datasheet(HTML) 8 Page - Renesas Technology Corp |
8 / 115 page REJ03B0271-0100 Rev.1.00 Sep 15, 2009 Page 8 of 113 M16C/63 Group 1. Overview 1.4 Block Diagram Figure 1.4 and Figure 1.5 show block diagrams. Figure 1.4 Block Diagram for the 100-Pin Package DMAC (4 channels) Internal peripheral functions UART or clock synchronous serial I/O (6 channels) System clock generator XIN-XOUT XCIN-XCOUT On-chip oscillator (125 kHz) High-speed on-chip oscillator Clock synchronous serial I/O (8-bit x 2 channels) Notes: 1. ROM size depends on MCU type. 2. RAM size depends on MCU type. 8 8 8 8 8 8 Port P5 Port P4 Port P3 Port P2 Port P1 Port P0 VCC2 ports M16C/60 Series CPU core R1H R1L R0H R0L R3 R2 A0 A1 FB Multiplier ROM (1) Memory RAM (2) SB ISP USP INTB PC FLG CRC calculator (CRC-CCITT or CRC-16) Three-phase motor control circuit 8 8 8 Port P7 Port P8 Port P9 Port P10 8 Port P6 8 Timer (16-bit) Outputs (timer A): 5 Inputs (timer B): 6 VCC1 ports Real-time clock PWM function (8-bit x 2) Remote control signal receiver (2 circuits) Watchdog timer (15-bit) A/D converter (10-bit resolution x 26 channels) D/A converter (8 bit-resolution x 2 circuits) Multi-master I2C-bus interface (1 channel) CEC function Voltage detector On-chip debugger Power-on reset |
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