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74HC374DTR2G Datasheet(PDF) 5 Page - ON Semiconductor |
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74HC374DTR2G Datasheet(HTML) 5 Page - ON Semiconductor |
5 / 9 page 74HC374 http://onsemi.com 5 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns) Symbol Parameter VCC (V) Guaranteed Limit Unit – 55 to 25_C v 85_C v 125_C fmax Maximum Clock Frequency (50% Duty Cycle) 2.0 3.0 4.5 6.0 6 15 30 35 5 10 24 28 4 8 20 24 MHz tPLH tPHL Maximum Propagation Delay, Input Clock to Q (Figures 1 and 5) 2.0 3.0 4.5 6.0 125 80 25 21 155 110 31 26 190 130 38 32 ns tPLZ tPHZ Maximum Propagation Delay, Output Enable to Q (Figures 3 and 6) 2.0 3.0 4.5 6.0 150 100 30 26 190 125 38 33 225 150 45 38 ns tPLZ tPHZ Maximum Propagation Delay, Output Enable to Q (Figures 3 and 6) 2.0 3.0 4.5 6.0 150 100 30 26 190 125 38 33 225 150 45 38 ns tTLH tTHL Maximum Output Transition Time, Any Output (Figures 1 and 5) 2.0 3.0 4.5 6.0 75 27 15 13 95 32 19 16 110 36 22 19 ns Cin Maximum Input Capacitance 10 10 10 pF Cout Maximum Three−State Output Capacitance (Output in High−Impedance State) 15 15 15 pF NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). CPD Power Dissipation Capacitance (Per Enabled Output)* Typical @ 25°C, VCC = 5.0 V pF 34 * Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). |
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