10

FN7552.0

December 17, 2009

Interconnection with 3V and 5V

Logic

The ICL3221EM directly interfaces with 5V CMOS and TTL

logic families. Nevertheless, with the ICL3221EM at 3.3V,

and the logic supply at 5V, AC, HC, and CD4000 outputs

can drive ICL3221EM inputs, but ICL3221EM outputs do

Table 4 for more information.

±15kV ESD Protection

All pins on ICL3221EM devices include ESD protection

structures, but the ICL3221EM family incorporates

advanced structures which allow the RS-232 pins

(transmitter outputs and receiver inputs) to survive ESD

events up to ±15kV. The RS-232 pins are particularly

vulnerable to ESD damage because they typically

connect to an exposed port on the exterior of the finished

product. Simply touching the port pins, or connecting a

cable, can cause an ESD event that might destroy

unprotected ICs. These new ESD structures protect the

device whether or not it is powered up, protect without

allowing any latch-up mechanism to activate, and don’t

interfere with RS-232 signals as large as ±25V.

Human Body Model (HBM) Testing

As the name implies, this test method emulates the ESD

event delivered to an IC during human handling. The

tester delivers the charge through a 1.5kΩ current

limiting resistor, making the test less severe than the

IEC61000 test, which utilizes a 330Ω limiting resistor.

The HBM method determines an IC’s ability to withstand

the ESD transients typically present during handling and

manufacturing. Due to the random nature of these

events, each pin is tested with respect to all other pins.

The RS-232 pins on “E” family devices can withstand

HBM ESD events to ±15kV.

IEC61000-4-2 Testing

The IEC61000 test method applies to finished

equipment, rather than to an individual IC. Therefore,

the pins most likely to suffer an ESD event are those that

are exposed to the outside world (the RS-232 pins in this

case), and the IC is tested in its typical application

configuration (power applied) rather than testing each

pin-to-pin combination. The lower current limiting

resistor coupled with the larger charge storage capacitor

yields a test that is much more severe than the HBM test.

The extra ESD protection built into this device’s RS-232

pins allows the design of equipment meeting level 4

criteria without the need for additional board level

protection on the RS-232 port.

AIR-GAP DISCHARGE TEST METHOD

For this test method, a charged probe tip moves toward

the IC pin until the voltage arcs to it. The current

waveform delivered to the IC pin depends on approach

speed, humidity, temperature, etc., so it is difficult to

obtain repeatable results. The “E” device RS-232 pins

withstand ±15kV air-gap discharges.

CONTACT DISCHARGE TEST METHOD

During the contact discharge test, the probe contacts the

tested pin before the probe tip is energized, thereby

eliminating the variables associated with the air-gap

discharge. The result is a more repeatable and

predictable test, but equipment limits prevent testing

devices at voltages higher than ±8kV. All “E” family

devices survive ±8kV contact discharges on the RS-232

pins.

FIGURE 10. LOOPBACK TEST AT 120kbps

FIGURE 11. LOOPBACK TEST AT 250kbps

TABLE 4. LOGIC FAMILY COMPATIBILITY WITH

VARIOUS SUPPLY VOLTAGES

SYSTEM

POWER-SUPPLY

VOLTAGE

(V)

SUPPLY

VOLTAGE

(V)

COMPATIBILITY

3.3

3.3

Compatible with all CMOS

families.

5µs/DIV

5V/DIV

C1 - C4 = 0.1µF

2µs/DIV

5V/DIV

C1 - C4 = 0.1µF

ISL3221EM