NCP5392T

http://onsemi.com

7

PIN DESCRIPTIONS

Pin No.

Symbol

Description

1

EN

Threshold sensitive input. High = startup, Low = shutdown.

2

VID0

Voltage ID DAC input

3

VID1

Voltage ID DAC input

4

VID2

Voltage ID DAC input

5

VID3

Voltage ID DAC input

6

VID4

Voltage ID DAC input

7

VID5

Voltage ID DAC input

8

VID6

Voltage ID DAC input

9

VID7

Voltage ID DAC input

10

ROSC

trimmed output voltage of 2 V.

11

ILIM

Overcurrent shutdown threshold setting. Connect this pin to the ROSC pin via a resistor divider as shown in

the Application Schematics. To disable the overcurrent feature, connect this pin directly to the ROSC pin. To

guarantee correct operation, this pin should only be connected to the voltage generated by the ROSC pin; do

not connect this pin to any externally generated voltages.

12

IMON

0 mV to 900 mV analog signal proportional to the output load current. VSN referenced

13

VSP

Non−inverting input to the internal differential remote sense amplifier

14

VSN

Inverting input to the internal differential remote sense amplifier

15

DIFFOUT

Output of the differential remote sense amplifier

16

COMP

Output of the error amplifier

17

VFB

Compensation Amplifier Voltage feedback

18

VDRP

Voltage output signal proportional to current used for current limit and output voltage droop

19

VDFB

Droop Amplifier Voltage Feedback

20

CSSUM

Inverted Sum of the Differential Current Sense inputs. Av=CSSUM/CSx = −4

21

CS1N

Inverting input to current sense amplifier #1

22

CS1

Non−inverting input to current sense amplifier #1

23

CS2N

Inverting input to current sense amplifier #2

24

CS2

Non−inverting input to current sense amplifier #2

25

CS3N

Inverting input to current sense amplifier #3

26

CS3

Non−inverting input to current sense amplifier #3

27

CS4N

Inverting input to current sense amplifier #4

28

CS4

Non−inverting input to current sense amplifier #4

29

DRVON

Bidirectional Gate Drive Enable

30

G1

PWM output pulse to gate driver. 3−level output: Low = LSFET Enabled, Mid = Diode Emulation Enabled,

High = HSFET Enabled

31

G2

PWM output pulse to gate driver. 3−level output (see G1)

32

G3

PWM output pulse to gate driver. 3−level output (see G1)

33

G4

PWM output pulse to gate driver. 3−level output (see G1)

34

12VMON

Monitor a 12 V input through a resistor divider.

35

VCC

Power for the internal control circuits.

36

DAC

DAC Feed Forward Output

37

PSI

Power Saving Control. Low = single phase operation, High = normal operation.

38

NTC

Threshold sensitive input for thermal monitoring

39

VR_RDY

40

VR_HOT

Open collector output indicates the state of the thermal monitoring input. Low impedance output indicating a

normal status when the voltage of NTC pin is above the specified threshold. This pin will transition to high

impedance when the voltage of NTC pin decrease (temperature increase) below the specified threshold.

This pin requires an external pullup resistor

FLAG

GND

Power supply return (QFN Flag)