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AD7291 Datasheet(PDF) 7 Page - Analog Devices |
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AD7291 Datasheet(HTML) 7 Page - Analog Devices |
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7 / 21 page  Preliminary Technical Data AD7291 Rev. PrC | Page 7 of 21 CIRCUIT INFORMATION The AD7291 includes an 8-channel multiplexer, an on-chip track-and-hold, an A/D converter, an on-chip oscillator, internal data registers, internal temperature sensor and an I2C- compatible serial interface, all housed in a 20-lead LFCSP. This package offers considerable space-saving advantages over alternative solutions. The part can be operated from a single supply from 2.8V to 3.6 V and offers 12 bits of resolution. The AD7291 has eight single-ended input channels and an on-chip ±6ppm reference. The analog input range for the AD7928 is 0V to VREF. The AD7298 includes a high accuracy band-gap temperature sensor, which is monitored and digitized by the 12- bit ADC to give a resolution of 0.25°C. The AD7291 typically remains in a partial power-down state while not converting. When supplies are first applied, the parts power up in a power-down state. Power-up is initiated prior to a conversion, and the device returns to shutdown when the conversion is complete. Conversions can be initiated using the autocycle mode or command mode where the wake-up and a conversion occur during a write address function (see the Modes of Operation section). When the conversion is complete, the AD7291 again enters partial power down mode. This automatic partial power down feature allows power saving between conversions. This means any read or write operation across the I2C interface can occur while the device is in partial power down. CONVERTER OPERATION The AD7298 is a 12-bit successive approximation ADC based around a capacitive DAC. Figure 4 and Figure 5 show simplified schematics of theADC. TheADC is comprised of control logic, SAR, and a capacitive DAC that are used to add and subtract fixed amounts of charge from the sampling capacitor to bring the comparator back into a balanced condition. Figure 4 shows theADC during its acquisition phase. SW2 is closed and SW1 is in Position A. The comparator is held in a balanced condition and the sampling capacitor acquires the signal on the selected VIN channel. Figure 4. ADC Acquisition Phase When the ADC starts a conversion (see Figure 5Figure 5), SW2 opens and SW1 moves to Position B, causing the comparator to become unbalanced. The control logic and the capacitive DAC are used to add and subtract fixed amounts of charge to bring the comparator back into a balanced condition. When the comparator is rebalanced, the conversion is complete. The control logic generates the ADC output code. Figure 7 shows the ADC’s transfer functions. Figure 5. ADC Conversion Phase ANALOG INPUT Figure 6 shows an equivalent circuit of the analog input struc- ture of the AD7291. The two diodes, D1 and D2, provide ESD protection for the analog inputs. Care must be taken to ensure that the analog input signal never exceeds the internally generated LDO voltage of 2.5V (DCAP) by more than 300 mV. This causes the diodes to become forward biased and start conducting current into the substrate. 10 mA is the maximum current these diodes can conduct without causing irreversible damage to the part. Capacitor C1, in Figure 6 is typically about TBD pF and can primarily be attributed to pin capacitance. The Resistor R1 is a lumped component made up of the on resistance of a switch (track-and-hold switch) and also includes the on resistance of the input multiplexer. The total resistance is typically about TBD Ω. The capacitor, C2, is the ADC sampling capacitor and has a capacitance of TBD pF typically. Figure 6. Equivalent Analog Input Circuit For AC applications, removing high frequency components from the analog input signal is recommended by using an RC low-pass filter on the relevant analog input pin. In applications where harmonic distortion and signal-to-noise ratios are critical, the analog input should be driven from a low impedance source. Large source impedances significantly affect the ac performance of the ADC. This may necessitate the use of an input buffer amplifier. The choice of the op amp is a function of the particular application performance criteria. |
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