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AD7291BCPZ-RL7 Datasheet(PDF) 6 Page - Analog Devices |
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AD7291BCPZ-RL7 Datasheet(HTML) 6 Page - Analog Devices |
6 / 21 page AD7291 Preliminary Technical Data Rev. PrC | Page 6 of 21 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Pin Configuration Note: The exposed metal paddle on the bottom of the LFCSP package should be soldered to PCB ground for proper heat dissipation and performance. Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1-5, 18,19, 20 VIN1, VIN2, VIN3, VIN4, VIN5, VIN6 VIN7, VIN8 Analog Inputs. The AD7291 has 8 single-ended analog inputs that are multiplexed into the on-chip track-and- hold. Each input channel can accept analog inputs from 0V to 2.5V. Any unused input channels should be connected to GND1 to avoid noise pickup. 14 SDA Digital Input/Output. Serial bus bidirectional data. This open-drain output requires a pull-up resistor. The output coding is straight binary for the voltage channels and two’s complement for the temperature sensor result. 16 VDRIVE Logic Power Supply Input. The voltage supplied at this pin determines at the voltage at which the interface operates. This pin should be decoupled to GND. The voltage range on this pin is 1.65V to 3.6V and may be less than the voltage at VDD, but should never exceed it by more than 0.3V. To set the input and output thresholds, connect this pin to the supply to which the I2C bus is pulled. 10 VDD Supply Voltage, 2.8 V to 3.6 V. This supply should be decoupled to GND with 10 µF and 100 nF decoupling capacitors. 7 VREF Internal Reference / External Reference supply. The nominal internal reference voltage of 2.5V appears at this pin. Provided the output is buffered, the on-chip reference can be taken from this pin and applied externally to the rest of a system. Decoupling capacitors should be connected to this pin to decouple the reference buffer to GND1. For best performance, it is recommended to use a 10 μF decoupling capacitor. The internal reference can be disabled and an external reference supplied to this pin if required. The input voltage range for the external reference is 2.0 V to 2.5V. 6 GND1 Ground. Ground reference point for the internal reference circuitry on the AD7291. All analog input signals and the external reference signals should be referred to this GND1 voltage. The GND1 pin should be connected to the GND plane of a system. All GND1 pins should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. The VREF should be decoupled to this ground pin via a 10 μF decoupling cap. 9 GND Ground. Ground reference point for all analog and digital circuitry on the AD7291. The GND pin should be connected to the GND plane of a system. All GND pins should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. Both DCAP and VDD should be decoupled to this GND pin. 15 SCL Serial I2C Bus Clock. The data transfer rate in I2C mode is compatible with both 100 kHz and 400 kHz operating modes. This open-drain output requires pull-up resistors. 12 ALERT Digital Output. This pin acts as an out-of-range indicator and if enabled, becomes active when the conversion result violates the DATAHIGH or DATALOW register values. See the Limit Register section. 11, 13 AS0, AS1 Logic Input. Together, the logic state of these inputs selects a unique I2C address for the AD7291. See Table X for details. The device address depends on the voltage applied to these pins. 17 PD Power Down Pin. This pin will place the part into a full power down mode and will enable power conservation when the parts operation is not required. This pin can be used to RESET the device by toggling the pin LOW for a minimum of TBD ns and a maximum of TBDns. If the maximum time is exceeded the part will enter power-down mode. /RST 8 DCAP Decoupling Capacitor Pin. Decoupling capacitor (10 μF recommended) is connected to this pin to decouple the internal LDO. |
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