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HT82K68A-L Datasheet(PDF) 6 Page - Holtek Semiconductor Inc |
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HT82K68A-L Datasheet(HTML) 6 Page - Holtek Semiconductor Inc |
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6 / 38 page  Mode Program Counter *11 *10 *9 *8 *7 *6 *5 *4 *3 *2 *1 *0 Initial reset 000000000000 External interrupt 000000000100 Timer counter overflow 000000001000 Skip Program Counter+2 Loading PCL *11 *10 *9 *8 @7 @6 @5 @4 @3 @2 @1 @0 Jump, call branch #11 #10 #9 #8 #7 #6 #5 #4 #3 #2 #1 #0 Return from subroutine S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 HT82K68E-L/HT82K68A-L Rev. 1.30 6 August 5, 2009 T 1 T 2 T 3 T 4 T 1 T 2 T 3 T 4 T 1 T 2 T 3 T 4 F e t c h I N S T ( P C ) E x e c u t e I N S T ( P C - 1 ) F e t c h I N S T ( P C + 1 ) E x e c u t e I N S T ( P C ) F e t c h I N S T ( P C + 2 ) E x e c u t e I N S T ( P C + 1 ) P C P C + 1 P C + 2 S y s t e m C l o c k O S C 2 ( R C o n l y ) P C ( N M O S o p e n d r a i n o u t p u t ) Execution Flow Functional Description Execution Flow The device system clock is derived from either a crystal or an RC oscillator. The system clock is internally di- vided into four non-overlapping clocks. One instruction cycle consists of four system clock cycles. Instruction fetching and execution are pipelined in such a way that a fetch takes one instruction cycle while de- coding and execution takes the next instruction cycle. However, the pipelining scheme causes each instruc- tion to effectively execute within one cycle. If an instruc- tion changes the program counter, two cycles are required to complete the instruction. Program Counter - PC The 12-bit program counter (PC) controls the sequence in which the instructions stored in the program ROM are executed and its contents specify a maximum of 4096 addresses. After accessing a program memory word to fetch an in- struction code, the contents of the program counter are incremented by one. The program counter then points to the memory word containing the next instruction code. When executing a jump instruction, conditional skip ex- ecution, loading PCL register, subroutine call, initial re- set, internal interrupt, external interrupt or return from subroutine, the PC manipulates the program transfer by loading the address corresponding to each instruction. The conditional skip is activated by instruction. Once the condition is met, the next instruction, fetched during the current instruction execution, is discarded and a dummy cycle replaces it to get the proper instruction. Otherwise proceed with the next instruction. The lower byte of the program counter (PCL) is a read- able and writeable register (06H). Moving data into the PCL performs a short jump. The destination will be within 256 locations. Once a control transfer takes place, an additional dummy cycle is required. Program Memory - ROM The program memory is used to store the program in- structions which are to be executed. It also contains data, table, and interrupt entries, and is organized with 3072 ´16 bits, addressed by the program counter and ta- ble pointer. Note: *11~*0: Program counter bits #11~#0: Instruction code bits S11~S0: Stack register bits @7~@0: PCL bits |
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