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UCD7242RSJR Datasheet(PDF) 4 Page - Texas Instruments |
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UCD7242RSJR Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 32 page  UCD7242 SLUS962 – JANUARY 2010 www.ti.com ELECTRICAL CHARACTERISTICS VIN = 12V; 1mF from BP3 to GND, 0.22mF from BST to BSW, 4.7mF from VGG to PGND, TA = TJ = –40°C to 125°C (unless otherwise noted) PARAMETER TEST CONDITION MIN TYP MAX UNIT SUPPLY SECTION Outputs not switching, VIN = 2.2 V, 6 mA PWM(INH) = LOW, SRE(INL) = HIGH, VGG_DIS = HIGH, VGG = 5V Supply current Outputs not switching, VIN = 18 V, 6 mA PWM(INH) = LOW, SRE(INL) = HIGH, VGG_DIS = LOW GATE DRIVE UNDER VOLTAGE LOCKOUT VGG UVLO ON BP3 Rising 4.0 V UVLO OFF BP3 Falling 3.8 V UVLO hysteresis 200 mV VGG SUPPLY GENERATOR VGG VIN = 7 to 18 V 5.2 6.25 6.8 V VGG drop out VIN = 4.75 to 7 V, IVGG < 50 mA 600 mV BP3 SUPPLY VOLTAGE BP3 IDD = 0 to 10 mA 3.15 3.3 3.45 V INPUT SIGNAL (PWM, SRE) VIH Positive-going input threshold voltage 2.1 2.3 V VIL Negative-going input threshold voltage 1 1.2 V 3-state Condition 1.4 1.9 V tHLD_R 3-state hold-off time VPWM = 1.65 V 275 ns VPWM = 5.0 V 133 IPWM Input current VPWM = 3.3 V 66 mA VPWM = 0 V –66 VSRE = 5.0 V 1 ISRE Input current VSRE = 3.3 V 1 mA VSRE = 0 V 1 VGG DISABLE (VGG_DIS) Input resistance to AGND VGG_DIS 50 100 150 k Ω Threshold 1.35 1.6 V Hysteresis 550 mV FAULT FLAG (FLT) FLT Output High Level IOH = 2 mA 2.7 V FLT Output Low Level IOL = –2 mA 0.6 V CURRENT LIMIT Over current threshold 14.5 15 15.5 A Tfault_HS delay until HS FET off (1) 80 ns Tfault_FF delay until FLT asserted (1) 100 ns Propagation delay from PWM to reset FLT(1) 1st falling edge of PWM without a fault event 100 ns High side blanking time(1) Over currents during this period will not be detected 60 ns CURRENT SENSE AMPLIFIER Gain IMON/ IOUT, (see Figure 14 ) 19 20 21 mA/A Bandwidth(1) 5 kHz (1) As designed and characterized. Not 100% tested in production. 4 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UCD7242 |
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