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DM9000 Datasheet(PDF) 9 Page - Davicom Semiconductor, Inc. |
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DM9000 Datasheet(HTML) 9 Page - Davicom Semiconductor, Inc. |
9 / 53 page DM9000 ISA to Ethernet MAC Controller with Integrated 10/100 PHY Final 9 Version: DM9000-DS-F03 April 23, 2009 When it is pulled high, the LED mode is mode 1; Otherwise it is mode 0 Note: The pins EECS,EECK and EEDO are all have a pulled down resistor about 60k ohm internally 5.4 Clock Interface 21 X2_25M O Crystal 25MHz Out 22 X1_25M I Crystal 25MHz In 59 CLK20MO O 20Mhz Clock Output It is used as the clock signal for the external MII device’s clock is 20MHz This pin has a pulled down resistor about 60k ohm internally. 5.5 LED Interface 60 SPEED100# O Speed LED Its low output indicates that the internal PHY is operated in 100M/S, or it is floating for the 10M mode of the internal PHY 61 DUP# O Full-duplex LED In LED mode 1, Its low output indicates that the internal PHY is operated in full-duplex mode, or it is floating for the half-duplex mode of the internal PHY In LED mode 0, Its low output indicates that the internal PHY is operated in 10M mode, or it is floating for the 100M mode of the internal PHY 62 LINK&ACT# O Link LED In LED mode 1, it is the combined LED of link and carrier sense signal of the internal PHY In LED mode 0, it is the LED of the carrier sense signal of the internal PHY only 5.6 10/100 PHY 25 BGGND P Bandgap Ground 26 BGRES I/O Bandgap Pin 27 AVDD P Bandgap and Guard Ring Power 28 AVDD P RX Power 29 RXI+ I TP RX Input 30 RXI- I TP RX Input 31 AGND P RX Ground 32 AGND P TX Ground 33 TXO+ O TP TX Output 34 TXO- O TP TX Output 35 AVDD P TX Power 5.7 Miscellaneous 16,17,18, 19 TEST1~TEST4 I Operation Mode Test 1, 2, 3, 4 = (1, 1, 0, 0) in normal application 48 TEST5 I It must be ground. |
Similar Part No. - DM9000_09 |
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Similar Description - DM9000_09 |
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