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AD6659-80EBZ Datasheet(PDF) 4 Page - Analog Devices

Part # AD6659-80EBZ
Description  Dual IF Receiver
Download  40 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD6659-80EBZ Datasheet(HTML) 4 Page - Analog Devices

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AD6659
Rev.
| Page 4 of 4
0
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V; DRVDD = 1.8 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference; AIN = −1.0 dBFS,
DCS disabled, unless otherwise noted.
Table 1.
Parameter
Temp
Min
Typ
Max
Unit
RESOLUTION
Full
12
Bits
ACCURACY
No Missing Codes
Full
Guaranteed
Offset Error
Full
±0.05
±0.5
% FSR
Gain Error1
Full
−1.9
% FSR
Differential Nonlinearity (DNL)2
Full
±0.30
LSB
25°C
±0.13
LSB
Integral Nonlinearity (INL)2
Full
±0.40
LSB
25°C
±0.17
LSB
MATCHING CHARACTERISTICS
Offset Error
25°C
±0.0
±0.65
% FSR
Gain Error1
25°C
0.4
% FSR
TEMPERATURE DRIFT
Offset Error
Full
±2
ppm/°C
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode)
Full
0.981
0.993
1.005
V
Load Regulation Error at 1.0 mA
Full
2
mV
INPUT REFERRED NOISE
VREF = 1.0 V
25°C
0.25
LSB rms
ANALOG INPUT
Input Span, VREF = 1.0 V
Full
2
V p-p
Input Capacitance3
Full
6.5
pF
Input Common-Mode Voltage
Full
0.9
V
Input Common-Mode Range
Full
0.5
1.3
V
REFERENCE INPUT RESISTANCE
Full
7.5
POWER SUPPLIES
Supply Voltage
AVDD
Full
1.7
1.8
1.9
V
DRVDD
Full
1.7
3.6
V
Supply Current
IAVDD2
Full
113
119
mA
IDRVDD2 (1.8 V)
Full
9.3
mA
IDRVDD2 (3.3 V)
Full
18.5
mA
POWER CONSUMPTION
DC Input
Full
196
mW
Sine Wave Input2 (DRVDD = 1.8 V)
Full
220
240
mW
Sine Wave Input2 (DRVDD = 3.3 V)
Full
264
mW
Standby Power4
Full
37
mW
Power-Down Power
Full
1.0
mW
1 Measured with 1.0 V external reference.
2 Measured with a 10 MHz input frequency at rated sample rate, full-scale sine wave, with approximately 5 pF loading on each output bit.
3 Input capacitance refers to the effective capacitance between one differential input pin and AGND.
4 Standby power is measured with a dc input and the CLK active.


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