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HMT351U7AFR8C-H9 Datasheet(PDF) 11 Page - Hynix Semiconductor |
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HMT351U7AFR8C-H9 Datasheet(HTML) 11 Page - Hynix Semiconductor |
11 / 47 page Rev. 0.02 / Apr 2009 11 HMT351U6AFR8C HMT351U7AFR8C 48 NC NC 168 Reset Reset 108 DQ56 DQ56 228 DQ61 DQ61 KEY KEY 109 DQ57 DQ57 229 VSS VSS 49 NC NC 169 CKE1/NC CKE1/NC 110 VSS VSS 230 DM7 DM7 50 CKE0 CKE0 170 VDD VDD 111 DQS7DQS7 231 NC NC 51 VDD VDD 171 NC NC 112 DQS7 DQS7 232 VSS VSS 52 BA2 BA2 172 NC NC 113 VSS VSS 233 DQ62 DQ62 53 NC NC 173 VDD VDD 114 DQ58 DQ58 234 DQ63 DQ63 54 VDD VDD 174 A12 A12 115 DQ59 DQ59 235 VSS VSS 55 All All 175 A9 A9 116 VSS VSS 236 VDDSPD VDDSPD 56 A72 A72 176 VDD VDD 117 SA0 SA0 237 SA1 SA1 57 VDD VDD 177 A82 A82 118 SCL SCL 238 SDA SDA 58 A52 A52 178 A62 A62 119 SA2 SA2 239 VSS VSS 59 A42 A42 179 VDD VDD 120 VTT VTT 240 VTT VTT 60 VDD VDD 180 A32 A32 Front Side(left 1–60) Back Side(right 121–180) Front Side(left 61–120) Back Side(right 181–240) Pin # x64 Non-ECC x72 ECC Pin # x64 Non-ECC x72 ECC Pin # x64 Non-ECC x72 ECC Pin # x64 Non-ECC x72 ECC NC = No Connect; RFU = Reserved Future Use 1. NC pins should not be connected to anything on the DIMM, including bussing within the NC group. 2. Address pins A3–A8 and BA0 and BA1 can be mirrored or not mirrored. Please refer to Section 4.1 for more information on mirrored addresses. |
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