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BR24L04-W Datasheet(PDF) 4 Page - Rohm |
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BR24L04-W Datasheet(HTML) 4 Page - Rohm |
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4 / 33 page  4/32 ● Sync data input / output timing ● Block diagram ● Pin assignment and description SDA tSU:STA tSU:STO tHD:STA START BIT STOP BIT SCL ○ Input read at the rise edge of SCL ○ Data output in sync with the fall of SCL Fig.1-(a) Sync data input / output timing Fig.1-(b) Start-stop bit timing Fig.1-(c) Write cycle timing Fig.1-(d) WP timing at write execution Fig.1-(e) WP timing at write cancel ○ At write execution, in the area from the D0 taken clock rise of the first DATA(1), to tWR, set WP=“LOW”. ○ By setting WP “HIGH” in the area, write can be cancelled. When it is set WP=“HIGH” during tWR, write is forcibly ended, and data of address under access is not guaranteed, therefore write it once again. tHIGH:WP WP SDA D1 D0 ACK ACK DATA(1) DATA(n) tWR SCL SDA Write data ( n-th address) Stop condition Start condition SCL ｔ WR ACK D0 Fig.2 Block diagram Terminal name Input / output Function BR24L01A-W BR24L02-W BR24L04-W BR24L08-W BR24L16-W BR24L32-W BR24L64-W A0 Input Slave address setting Not connected Slave address setting A1 Input Slave address setting Not connected Slave address setting A2 Input Slave address setting Not used Slave address setting GND - Reference voltage of all input / output, 0V SDA Input / output Slave and word address, Serial data input serial data output SCL Input Serial clock input WP Input Write protect terminal Vcc - Connect the power source. 1Kbit~64Kbit EEPROM array Control circuit High voltage generating circuit Power source voltage detection 7bit 8bit 9bit 10bi t 11bit 12bit 13b it Address decoder Slave - word address register Data register 8bit 7bit 8bit 9bit 10bi t 11bit 12bit 13b it START STOP ACK *1 *1 1 2 3 4 8 7 6 5 SDA SCL WP Vcc A1 A0 A2 GND *2 *2 *2 ＊1 7bit : BR24L01A-W 8bit : BR24L02-W 9bit : BR24L04-W 10bit : BR24L08-W 11bit : BR24L16-W 12bit : BR24L32-W 13bit : BR24L64-W ＊2 A0=N.C. : BR24L04-W A0, A1=N.C. : BR24L08-W A0, A1= N.C. A2=Don’t Use : BR24L16-W 1 2 3 4 8 6 5 BR24L01A-W BR24L02-W BR24L04-W BR24L08-W BR24L16-W BR24L32-W BR24L64-W A0 7 A1 A2 GND Vcc WP SCL SDA SDA (入力) SDA (出力) tHD:STA tHD:DAT tSU:DAT tBUF tPD tDH tLOW tHIGH tR tF SCL (input) (output) SCL SDA WP ｔ HD：WP ストップコンディション ｔ WR D1 D0 ACK ACK DATA(1) DATA(n) tSU：WP Stop condition |
Similar Part No. - BR24L04-W |
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Similar Description - BR24L04-W |
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