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X24C44DM Datasheet(PDF) 2 Page - Xicor Inc. |
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X24C44DM Datasheet(HTML) 2 Page - Xicor Inc. |
2 / 15 page 2 X24C44 PIN CONFIGURATION PIN DESCRIPTIONS Chip Enable (CE) The Chip Enable input must be HIGH to enable all read/ write operations. CE must remain HIGH following a Read or Write command until the data transfer is com- plete. CE LOW places the X24C44 in the low power standby mode and resets the instruction register. There- fore, CE must be brought LOW after the completion of an operation in order to reset the instruction register in preparation for the next command. Serial Clock (SK) The Serial Clock input is used to clock all data into and out of the device. Data In (DI) Data In is the serial data input. Data Out (DO) Data Out is the serial data output. It is in the high impedance state except during data output cycles in response to a READ instruction. STORE STORE LOW will initiate an internal transfer of data from RAM to the E2PROM array. RECALL RECALL LOW will initiate an internal transfer of data from E2PROM to the RAM array. PIN NAMES Symbol Description CE Chip Enable SK Serial Clock DI Serial Data In DO Serial Data Out RECALL Recall Input STORE Store Input VCC +5V VSS Ground 3832 PGM T01 3832 FHD F02.2 CE SK DI DO 1 2 3 4 8 7 6 5 VCC STORE RECALL VSS X24C44 PDIP/CERDIP/SOIC |
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