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X88257S Datasheet(PDF) 5 Page - Xicor Inc. |
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X88257S Datasheet(HTML) 5 Page - Xicor Inc. |
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5 / 15 page  X88257 5 TOGGLE BIT POLLING Because the typical write timing is less than the specified 5ms, Toggle Bit Polling has been provided to determine the early end of write. During the internal programming cycle I/O6 will toggle from “1” to “0” and “0” to “1” on subsequent attempts to read the device. When the internal cycle is complete the toggling will cease and the device will be accessible for additional read or write operations. Toggle Bit Polling RD/WR Control RD LAST BYTE WRITTEN CE ALE A/D0–A/D7 A8–A14 WR AIN DIN An OPERATION AIN DOUT An AIN DOUT An AIN DOUT An AIN DOUT An AIN ADDR I/O6=X X88C64 READY FOR NEXT OPERATION 6509 ILL F09.1 I/O6=X I/O6=X I/O6=X Writing with SDP WRITE AA TO 5555 WRITE 55 TO 2AAA WRITE A0 TO 5555 PERFORM BYTE OR PAGE WRITE OPERATIONS WAIT tWC EXIT ROUTINE 6509 ILL F10.1 SOFTWARE DATA PROTECTION Software Data Protection (SDP) is employed to protect the entire array against inadvertent writes. To write to the X88257, a three-byte command sequence must precede the byte(s) being written. All write operations, both the command sequence and any data write operations must conform to the page write timing requirements. |
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