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X88064PI-60 Datasheet(PDF) 10 Page - Xicor Inc. |
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X88064PI-60 Datasheet(HTML) 10 Page - Xicor Inc. |
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10 / 15 page  X88064 10 PSEN Controlled Read Cycle 7023 FRM T09 PSEN Controlled Read Timing Diagram X88064 – 60 X88064 Symbol Parameter Min. Max. Min. Max. Units tLHLL ALE Pulse Width 60 80 ns tAVLL Address Setup Time 10 10 ns tLLAX Address Hold Time 20 20 ns tPLDV PSEN Read Access Time 45 80 ns tPHDX Data Hold Time 0 0 ns tELLL Chip Enable Setup Time 7 7 ns PWPL PSEN Pulse Width 100 140 ns tPS PSEN Setup Time 20 30 ns tPH PSEN Hold Time 20 20 ns tPHDZ (5) PSEN Disable to Output in High Z 20 30 ns tPLDX (5) PSEN to Output in Low Z 10 10 ns ALE A/D0 –A/D7 A8 –A12 PSEN AIN tPLDV DOUT 7023 FRM F10 tPH tPH tLHLL tAVLL tLLAX tPS PWPL ADDRESS CE tPLDX tPHDZ tPHDX t ELLL A.C. CONDITIONS OF TEST 7023 FRM T08 Input Pulse Levels 0V to 3V Input Rise and Fall Times 10ns Input and Output Timing Levels 1.5V 7023 FRM F09 5V 1.92K Ω 100pF OUTPUT 1.37K Ω EQUIVALENT A.C. TEST CIRCUIT |
Similar Part No. - X88064PI-60 |
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Similar Description - X88064PI-60 |
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