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74ABT646APW Datasheet(PDF) 4 Page - NXP Semiconductors |
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74ABT646APW Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 19 page 74ABT646A_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 — 15 March 2010 4 of 19 NXP Semiconductors 74ABT646A Octal bus transceiver/register; 3-state 5. Pinning information 5.1 Pinning 5.2 Pin description Fig 4. Pin configuration 74ABT646A CPAB VCC SAB CPBA DIR SBA A0 OE A1 B0 A2 B1 A3 B2 A4 B3 A5 B4 A6 B5 A7 B6 GND B7 001aae890 1 2 3 4 5 6 7 8 9 10 11 12 14 13 16 15 18 17 20 19 22 21 24 23 Table 2. Pin description Symbol Pin Description CPAB 1 A to B clock input SAB 2 A to B select input DIR 3 direction control input A0, A1, A2, A3, A4, A5, A6, A7 4, 5, 6, 7, 8, 9, 10, 11 data input/output (A side) GND 12 ground (0 V) B0, B1, B2, B3, B4, B5, B6, B7 20, 19, 18, 17, 16, 15, 14, 13 data input/output (B side) OE 21 output enable input (active LOW) SBA 22 B to A select input CPBA 23 B to A clock input VCC 24 positive supply voltage |
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