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74ABT823PW Datasheet(PDF) 4 Page - NXP Semiconductors |
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74ABT823PW Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 17 page 74ABT823_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 — 23 March 2010 4 of 17 NXP Semiconductors 74ABT823 9-bit D-type flip-flop with reset and enable; 3-state 5. Pinning information 5.1 Pinning 5.2 Pin description Fig 4. Pin configuration 74ABT823 OE VCC D0 Q0 D1 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7 D8 Q8 MR CE GND CP 001aal300 1 2 3 4 5 6 7 8 9 10 11 12 14 13 16 15 18 17 20 19 22 21 24 23 Table 2. Pin description Symbol Pin Description OE 1 output enable input (active LOW) D0, D1, D2, D3, D4, D5, D6, D7, D8 2, 3, 4, 5, 6, 7, 8, 9, 10 data input MR 11 master reset input (active LOW) GND 12 ground (0 V) CP 13 clock pulse input (active rising edge) CE 14 clock enable input (active LOW) Q8, Q7, Q6, Q5, Q4, Q3, Q3, Q2, Q1, Q0 15, 16, 17, 18, 19, 20, 21, 22, 23 data output VCC 24 positive supply voltage |
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