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74AUP2G126GT Datasheet(PDF) 2 Page - NXP Semiconductors |
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74AUP2G126GT Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 21 page 74AUP2G126_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 2 February 2009 2 of 21 NXP Semiconductors 74AUP2G126 Low-power dual buffer/line driver; 3-state 3. Ordering information 4. Marking 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP2G126DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74AUP2G126GT −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74AUP2G126GD −40 °C to +125 °C XSON8U plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 3 × 2 × 0.5 mm SOT996-2 74AUP2G126GM −40 °C to +125 °C XQFN8U plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 × 1.6 × 0.5 mm SOT902-1 Table 2. Marking codes Type number Marking code 74AUP2G126DC p26 74AUP2G126GT p26 74AUP2G126GD p26 74AUP2G126GM p26 Fig 1. Logic symbol Fig 2. Logic diagram (one gate) 001aah787 2A 1A 2OE 1OE 1Y 2Y mna234 nOE nA nY |
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