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AMPL138ZWT3 Datasheet(PDF) 7 Page - Texas Instruments |
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AMPL138ZWT3 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 268 page 1.4 Functional Block Diagram SwitchedCentralResource(SCR) 1024KBL2ROM 256KBL2RAM 32KB L1RAM 32KB L1Pgm 16KB I-Cache 16KB D-Cache AET 4KBETB C674x™ DSP CPU ARM926EJ-SCPU WithMMU DSP Subsystem ARMSubsystem JTAGInterface SystemControl Input Clock(s) 64KBROM 8KBRAM (VectorTable) Power/Sleep Controller Pin Multiplexing PLL/Clock Generator w/OSC General- Purpose Timer(x3) SerialInterfaces AudioPorts McASP w/FIFO DMA Peripherals Display InternalMemory LCD Ctlr 128KB RAM ExternalMemoryInterfaces Connectivity EDMA3 (x2) ControlTimers ePWM (x2) eCAP (x3) EMIFA(8b/16B) NAND/Flash 16bSDRAM DDR2/MDDR Controller RTC/ 32-kHz OSC I C (x2) 2 SPI (x2) UART (x3) McBSP (x2) Video VPIF ParallelPort uPP EMAC 10/100 (MII/RMII) MDIO USB1.1 OHCICtlr PHY USB2.0 OTGCtlr PHY HPI MMC/SD (8b) (x2) SATA CustomizableInterface PRUSubsystem OMAP-L138 Low-Power Applications Processor www.ti.com SPRS586A – JUNE 2009 – REVISED AUGUST 2009 (1) Note: Not all peripherals are available at the same time due to multiplexing. Figure 1-1. Functional Block Diagram Submit Documentation Feedback OMAP-L138 Low-Power Applications Processor 7 |
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