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AT42QT1011 Datasheet(PDF) 11 Page - ATMEL Corporation |
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AT42QT1011 Datasheet(HTML) 11 Page - ATMEL Corporation |
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11 / 18 page  11 9542G–AT42–03/10 AT42QT1011 Electrode trace routing: Keep the electrode trace (and the electrode itself) away from other signal, power, and ground traces including over or next to ground planes. Adjacent switching signals can induce noise onto the sensing signal; any adjacent trace or ground plane next to, or under, the electrode trace will cause an increase in Cx load and desensitize the device. Important Note: for proper operation a 100 nF (0.1 µF) ceramic bypass capacitor must be used directly between Vdd and Vss, to prevent latch-up if there are substantial Vdd transients; for example, during an ESD event. The bypass capacitor should be placed very close to the Vss and Vdd pins. 4.4 Power On On initial power up, the QT1011 requires approximately 100 ms to power on to allow power supplies to stabilize. During this time the OUT pin state is not valid and should be ignored. |
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