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TMS320C6726BRFP300 Datasheet(PDF) 58 Page - Texas Instruments |
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TMS320C6726BRFP300 Datasheet(HTML) 58 Page - Texas Instruments |
58 / 118 page EM_D[31:16]/UHPI_HA[15:0](A) UHPI_HCNTL[1:0] UHPI_HD[15:0] UHPI_HD[16]/HHWIL UHPI_HD[31:17] UHPI_HAS(B) UHPI_HBE[1:0](C) UHPI_HRW UHPI_HDS[2](G) UHPI_HDS[1](G) UHPI_HCS UHPI_HRDY AMUTE2/HINT NC or GPIO NC A[x:y](D) D[15:0] A[1](E) BE[1:0](F) R/W WE(G) RD(G) CS RDY INTERRUPT DSP External Host MCU TMS320C6727B, TMS320C6726B, TMS320C6722B, TMS320C6720 Floating-Point Digital Signal Processors SPRS370E – SEPTEMBER 2006 – REVISED JULY 2008 www.ti.com A. May be used as EM_D[31:16] B. Optional for hosts supporting multiplexed address and data. Pull up if not used. Low when address is on the bus. C. DSP byte enables UHPI_HBE[3:2] are not required in this mode. D. Two host address lines or host GPIO if address lines are not available. E. A[1], assuming this address increments from 0 to 1 between two successive 16-bit accesses. F. Byte Enables (active during reads and writes). Some processors support a byte-enable mode on their write-enable pins. G. Only required if needed for strobe timing. Not required if CS meets strobe timing requirements. Tie UHPI_HDS[2] and UHPI_HDS[1] opposite. For more information, see Figure 4-14. Figure 4-15. UHPI Multiplexed Host Address/Data Half-Word Mode 58 Peripheral and Electrical Specifications Submit Documentation Feedback |
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Similar Description - TMS320C6726BRFP300 |
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