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REV. A

○ BLOCK DIAGRAM

Pin

Number

Pin

Name

Function

1

CTL

Output Control Pin

2

Vcc

Power Supply Pin

3

GND

GND Pin

4

Vo

Output Pin

5

ADJ

Adjustable Pin

○Operation Notes

1. Absolute maximum ratings

Use of the IC in excess of absolute maximum ratings (such as the input voltage or operating temperature range) may result in damage

to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open mode) when such damage is suffered.

If operational values are expected to exceed the maximum ratings for the device, consider adding protective circuitry (such as fuses) to

eliminate the risk of damaging the IC.

2. Electrical characteristics described in these specifications may vary, depending on temperature, supply voltage, external circuits

and other conditions. Therefore, be sure to check all relevant factors, including transient characteristics.

3.GND potential

The potential of the GND pin must be the minimum potential in the system in all operating conditions. Ensure that no pins are at a

voltage below the GND at any time, regardless of transient characteristics.

4.Ground wiring pattern

When using both small-signal and large-current GND traces, the two ground traces should be routed separately but connected to a

single ground potential within the application in order to avoid variations in the small-signal ground caused by large currents. Also

ensure that the GND traces of external components do not cause variations on GND voltage. The power supply and ground lines must

be as short and thick as possible to reduce line impedance.

5.Inter-pin shorts and mounting errors

Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to

the IC. Shorts between output pins or between output pins and the power supply or GND pins (caused by poor soldering or foreign

objects) may result in damage to the IC.

6.Operation in strong electromagnetic fields

Using this product in strong electromagnetic fields may cause IC malfunction. Caution should be exercised in applications where

strong electromagnetic fields may be present.

7.Testing on application boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance pin may subject the IC to stress.

Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off completely

before connecting or removing it from a jig or fixture during the evaluation process. To prevent damage from static discharge, ground

the IC during assembly and use similar precautions during transport and storage.

8.Thermal consideration

Use a thermal design that allows for a sufficient margin in light of the Pd in actual operating conditions.

Consider Pc that does not exceed Pd in actual operating conditions. （Pd≧Pc）

Tjmax : Maximum junction temperature=150℃, Ta : Peripheral temperature[℃] ,

θja : Thermal resistance of package-ambience[℃/W], Pd : Package Power dissipation [W],

Pc : Power dissipation [W], Vcc : Input Voltage, Vo : Output Voltage, Io : Load, Ib : Bias Current

Package Power dissipation : Pd (W)＝(Tjmax－Ta)／θja

Power dissipation

: Pc (W)＝(Vcc－Vo)×Io＋Vcc×Ib

9.Vcc pin

Insert a capacitor（Vo≧5V:capacitor≧1μF～, Vo＜5V:capacitor≧2.2μF～） between the Vcc and GND pins.

The appropriate

capacitance value varies by application.

Be sure to allow a sufficient margin for input voltage levels.

ADJ

CTL

GND

5

4

3

2

1

Vcc

Vo

Driver

OCP

TSD

VREF

VREF

OCP

TSD

Driver

：Bandgap Reference

：Over Current Protection circuit

：Thermal Shut Down circuit

：Power Transistor Driver