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LM3S6938-IQN25-A2T Datasheet(PDF) 8 Page - Texas Instruments |
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LM3S6938-IQN25-A2T Datasheet(HTML) 8 Page - Texas Instruments |
8 / 559 page List of Figures Figure 1-1. Stellaris ® LM3S6938 Microcontroller High-Level Block Diagram ............................. 34 Figure 2-1. CPU Block Diagram ............................................................................................. 42 Figure 2-2. TPIU Block Diagram ............................................................................................ 43 Figure 5-1. JTAG Module Block Diagram ................................................................................ 53 Figure 5-2. Test Access Port State Machine ........................................................................... 56 Figure 5-3. IDCODE Register Format ..................................................................................... 62 Figure 5-4. BYPASS Register Format .................................................................................... 62 Figure 5-5. Boundary Scan Register Format ........................................................................... 63 Figure 6-1. Basic RST Configuration ...................................................................................... 65 Figure 6-2. External Circuitry to Extend Power-On Reset ........................................................ 66 Figure 6-3. Reset Circuit Controlled by Switch ........................................................................ 66 Figure 6-4. Power Architecture .............................................................................................. 68 Figure 6-5. Main Clock Tree .................................................................................................. 70 Figure 7-1. Hibernation Module Block Diagram ..................................................................... 129 Figure 7-2. Clock Source Using Crystal ................................................................................ 130 Figure 7-3. Clock Source Using Dedicated Oscillator ............................................................. 131 Figure 8-1. Flash Block Diagram .......................................................................................... 148 Figure 9-1. GPIO Port Block Diagram ................................................................................... 175 Figure 9-2. GPIODATA Write Example ................................................................................. 176 Figure 9-3. GPIODATA Read Example ................................................................................. 176 Figure 10-1. GPTM Module Block Diagram ............................................................................ 217 Figure 10-2. 16-Bit Input Edge Count Mode Example .............................................................. 221 Figure 10-3. 16-Bit Input Edge Time Mode Example ............................................................... 222 Figure 10-4. 16-Bit PWM Mode Example ................................................................................ 223 Figure 11-1. WDT Module Block Diagram .............................................................................. 253 Figure 12-1. ADC Module Block Diagram ............................................................................... 277 Figure 12-2. Differential Sampling Range, VIN_ODD = 1.5 V ...................................................... 280 Figure 12-3. Differential Sampling Range, VIN_ODD = 0.75 V .................................................... 281 Figure 12-4. Differential Sampling Range, VIN_ODD = 2.25 V .................................................... 281 Figure 12-5. Internal Temperature Sensor Characteristic ......................................................... 282 Figure 13-1. UART Module Block Diagram ............................................................................. 313 Figure 13-2. UART Character Frame ..................................................................................... 314 Figure 13-3. IrDA Data Modulation ......................................................................................... 316 Figure 14-1. SSI Module Block Diagram ................................................................................. 353 Figure 14-2. TI Synchronous Serial Frame Format (Single Transfer) ........................................ 356 Figure 14-3. TI Synchronous Serial Frame Format (Continuous Transfer) ................................ 356 Figure 14-4. Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 .......................... 357 Figure 14-5. Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .................. 357 Figure 14-6. Freescale SPI Frame Format with SPO=0 and SPH=1 ......................................... 358 Figure 14-7. Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ............... 359 Figure 14-8. Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 ........ 359 Figure 14-9. Freescale SPI Frame Format with SPO=1 and SPH=1 ......................................... 360 Figure 14-10. MICROWIRE Frame Format (Single Frame) ........................................................ 361 Figure 14-11. MICROWIRE Frame Format (Continuous Transfer) ............................................. 362 Figure 14-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ............ 362 April 05, 2010 8 Texas Instruments-Production Data Table of Contents |
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