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ADS6422IRGC25 Datasheet(PDF) 1 Page - Texas Instruments

Part # ADS6422IRGC25
Description  QUAD CHANNEL, 12-BIT, 105/80/65 MSPS ADC WITH SERIAL LVDS INTERFACE
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS6422IRGC25 Datasheet(HTML) 1 Page - Texas Instruments

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1
FEATURES
APPLICATIONS
DESCRIPTION
ADS6424
ADS6423
ADS6422
www.ti.com ............................................................................................................................................. SLAS532A–MAY 2007–REVISED JUNE 2007
QUAD CHANNEL, 12-BIT, 105/80/65 MSPS ADC WITH SERIAL LVDS INTERFACE
Base-station IF Receivers
12-Bit Resolution With No Missing Codes
Diversity Receivers
Simultaneous Sample and Hold
Medical Imaging
3.5dB Coarse Gain and upto 6dB
Test Equipment
Programmable Fine Gain for SFDR/SNR
Trade-Off
Table 1. ADS64XX Quad Channel Family
Serialized LVDS Outputs With Programmable
125 MSPS
105 MSPS
80 MSPS
65 MSPS
Internal Termination Option
ADS644X
Supports Sine, LVCMOS, LVPECL, LVDS
ADS6445
ADS6444
ADS6443
ADS6442
14 Bit
Clock Inputs and Amplitude down to 400
ADS642X
ADS6425
ADS6424
ADS6423
ADS6422
mVPP
12 Bit
(SLWS197)
Internal Reference With External Reference
Support
No External Decoupling Required for
References
3.3-V Analog and Digital Supply
64 QFN Package (9 mm
× 9 mm)
Pin Compatible 14-Bit Family (ADS644X -
SLAS531A)
Feature Compatible Dual Channel Family
(ADS624X - SLAS542A, ADS622X - SLAS543A)
Table 2. Performance Summary
ADS6425
ADS6424
ADS6423
ADS6422
Fin = 10MHz (0 dB gain)
90
91
91
93
SFDR, dBc
Fin = 170MHz (3.5 dB gain)
79
81
82
83
Fin = 10MHz (0 dB gain)
70.7
71.1
71.3
71.3
SINAD, dBFS
Fin = 170MHz (3.5 dB gain)
67.4
68.1
68.2
68.7
Power per channel, mW
420
340
300
265
The ADS6424/ADS6423/ADS6422 (ADS642X) is a family of high performance 12-bit 105/80/65 MSPS quad
channel A-D converters. Serial LVDS data outputs reduce the number of interface lines, resulting in a compact
64-pin QFN package (9 mm
× 9 mm) that allows for high system integration density. The device includes 3.5dB
coarse gain option that can be used to improve SFDR performance with little degradation in SNR. In addition to
the coarse gain, fine gain options also exist, programmable in 1dB steps up to 6dB.
The output interface is 2-wire, where each ADC data is serialized and output over two LVDS pairs. This makes it
possible to halve the serial data rate (compared to a 1-wire interface) and restrict it to less than 1Gbps easing
receiver design. The ADS642X also includes the traditional 1-wire interface that can be used at lower sampling
frequencies.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical
applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data
sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2007, Texas Instruments Incorporated
1
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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