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STM8S207RBT6BTR Datasheet(PDF) 63 Page - STMicroelectronics |
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STM8S207RBT6BTR Datasheet(HTML) 63 Page - STMicroelectronics |
63 / 103 page STM8S207xx, STM8S208xx Electrical characteristics Doc ID 14733 Rev 9 63/103 Total current consumption and timing in forced reset state Current consumption of on-chip peripherals Subject to general operating conditions for VDD and TA. HSI internal RC/fCPU = fMASTER = 16 MHz. Table 29. Total current consumption and timing in forced reset state Symbol Parameter Conditions Typ Max(1) Unit IDD(R) Supply current in reset state VDD = 5 V 1.6 mA VDD = 3.3 V 0.8 tRESETBL Reset release to bootloader vector fetch 150 µs 1. Data guaranteed by design, not tested in production. Table 30. Peripheral current consumption Symbol Parameter Typ. Unit IDD(TIM1) TIM1 supply current (1) 1. Data based on a differential IDD measurement between reset configuration and timer counter running at 16 MHz. No IC/OC programmed (no I/O pads toggling). Not tested in production. 220 µA IDD(TIM2) TIM2 supply current (1) 120 IDD(TIM3) TIM3 timer supply current (1) 100 IDD(TIM4) TIM4 timer supply current (1) 25 IDD(UART1) UART1 supply current (2) 2. Data based on a differential IDD measurement between the on-chip peripheral when kept under reset and not clocked and the on-chip peripheral when clocked and not kept under reset. No I/O pads toggling. Not tested in production. 90 IDD(UART3) UART3 supply current (2) 110 IDD(SPI) SPI supply current (2) 40 IDD(I 2 C) I2C supply current (2) 50 IDD(CAN) beCAN supply current (2) 210 IDD(ADC2) ADC2 supply current when converting (3) 3. Data based on a differential IDD measurement between reset configuration and continuous A/D conversions. Not tested in production. 1000 |
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