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STM8S207RBT6CTR Datasheet(PDF) 70 Page - STMicroelectronics |
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STM8S207RBT6CTR Datasheet(HTML) 70 Page - STMicroelectronics |
70 / 103 page Electrical characteristics STM8S207xx, STM8S208xx 70/103 Doc ID 14733 Rev 9 10.3.6 I/O port pin characteristics General characteristics Subject to general operating conditions for VDD and TA unless otherwise specified. All unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or an external pull-up or pull-down resistor. Table 37. I/O static characteristics Symbol Parameter Conditions Min Typ Max Unit VIL Input low level voltage VDD = 5 V -0.3 0.3 x VDD V VIH Input high level voltage 0.7 x VDD VDD + 0.3 V V Vhys Hysteresis(1) 700 mV Rpu Pull-up resistor VDD = 5 V, VIN = VSS 30 45 60 k Ω tR, tF Rise and fall time (10% - 90%) Fast I/Os Load = 50 pF 20 (2) ns Standard and high sink I/Os Load = 50 pF 125 (2) ns Ilkg Input leakage current, analog and digital VSS ≤ V IN ≤ V DD ±1 µA Ilkg ana Analog input leakage current VSS ≤ V IN ≤ V DD ±250 (2) nA Ilkg(inj) Leakage current in adjacent I/O(2) Injection current ±4 mA ±1(2) µA 1. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested in production. 2. Data based on characterization results, not tested in production. |
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