PEMD15_PUMD15_3

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 03 — 2 September 2009

3 of 10

NXP Semiconductors

PEMD15; PUMD15

NPN/PNP resistor-equipped transistors; R1 = 4.7 k

Ω, R2 = 4.7 kΩ

5.

Limiting values

[1]

Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard

footprint.

[2]

Reflow soldering is the only recommended soldering method.

Table 6.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

Per transistor; for the PNP transistor with negative polarity

collector-base voltage

open emitter

-

50

V

collector-emitter voltage

open base

-

50

V

emitter-base voltage

open collector

-

10

V

input voltage TR1

positive

-

+30

V

negative

-

−10

V

input voltage TR2

positive

-

+10

V

negative

-

−30

V

output current (DC)

-

100

mA

peak collector current

-

100

mA

total power dissipation

SOT363

[1] -

200

mW

SOT666

[1][2] -

200

mW

storage temperature

−65

+150

°C

junction temperature

-

150

°C

ambient temperature

−65

+150

°C

Per device

total power dissipation

SOT363

[1] -

300

mW

SOT666

[1][2] -

300

mW