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ADIS16385 Datasheet(PDF) 14 Page - Analog Devices |
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ADIS16385 Datasheet(HTML) 14 Page - Analog Devices |
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14 / 20 page  ADIS16385 Preliminary Technical Data Rev. PrA | Page 14 of 20 INPUT/OUTPUT CONFIGURATION Table 23 provides a summary of registers that provide input/output configuration and control. Table 23. Input/Output Registers Register Name Address Description AUX_DAC 0x30 Output voltage control, AUX_DAC GPIO_CTRL 0x32 General-purpose I/O control MSC_CTRL 0x34 Self-test, calibration, data-ready DATA-READY I/O INDICATOR The factory-default setting of MSC_CTRL[2:0] (110) establishes DIO1 as a positive-polarity data-ready signal. See Table 21 for additional data-ready configuration options. For example, set MSC_CTRL[2:0] = 100 (DIN = 0xB404) to change the polarity of the data-ready signal on DIO1 for interrupt inputs that require negative logic inputs for activation. The pulse width is between 100 μs and 200 μs over all conditions. GENERAL-PURPOSE I/O DIO1, DIO2, DIO3, and DIO4 are configurable, general-purpose I/O lines that serve multiple purposes. The data-ready controls in MSC_CTRL[2:0] have the highest priority for configuring DIO1 and DIO2. The alarm indicator controls in ALM_CTRL[2:0] have the second-highest priority for DIO1 and DIO2. GPIO_CTRL in Table 24 has the lowest priority for configuration DIO1, DIO2, and DIO4 and has absolute control over DIO3. Table 24. GPIO_CTRL Bit Descriptions Bits Description (Default = 0x0000) [15:12] Not used [11] General-Purpose I/O Line 4 (DIO4) data level [10] General-Purpose I/O Line 3 (DIO3) data level [9] General-Purpose I/O Line 2 (DIO2) data level [8] General-Purpose I/O Line 1 (DIO1) data level [7:4] Not used [3] General-Purpose I/O Line 4 (DIO4) direction control (1 = output, 0 = input) [2] General-Purpose I/O Line 3 (DIO3) direction control (1 = output, 0 = input) [1] General-Purpose I/O Line 2 (DIO2) direction control (1 = output, 0 = input) [0] General-Purpose I/O Line 1 (DIO1) direction control (1 = output, 0 = input) Example I/O Configuration For example, set GPIO_CTRL[3:0] = 0100 to set DIO3 as an output signal pin and DIO1, DIO2, and DIO4 as input signal pins. Set the output on DIO3 to 1 by setting GPIO_CTRL[10] = 1 (DIN = 0xB304). Then, read GPIO_CTRL (DIN = 0x3200) and mask off GPIO_CTRL[9:8] and GPIO_CTRL[11] to monitor the digital signal levels on DIO4, DIO2, and DIO1. AUXILIARY DAC The AUX_DAC register in Table 25 provides user controls for setting the output voltage on the AUX_DAC pin. The 12-bit AUX_DAC line can drive its output to within 5 mV of the ground reference when it is not sinking current. As the output approaches 0 V, the linearity begins to degrade (~100 LSB starting point). As the sink current increases, the nonlinear range increases. The DAC latch command in GLOB_CMD[2] (see Table 15) moves the values of the AUX_DAC register into the DAC input register, enabling both bytes to take effect at the same time. This prevents undesirable output levels, which reflect single-byte changes of the AUX_DAC register. Table 25. AUX_DAC Bit Descriptions Bits Description (Default = 0x0000) [15:12] Not used [11:0] Data bits, scale factor = 0.8059 mV/LSB Offset binary format, 0 V = 0 LSB Table 26. Setting AUX_DAC = 1 V DIN Description 0xB0D9 AUX_DAC[7:0] = 0xD9 (217 LSB) 0xB104 AUX_DAC[15:8] = 0x04 (1024 LSB) 0xBE04 GLOB_CMD[2] = 1; move values into the DAC input register, resulting in a 1 V output level |
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