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ADIS16385 Datasheet(PDF) 15 Page - Analog Devices |
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ADIS16385 Datasheet(HTML) 15 Page - Analog Devices |
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15 / 20 page  Preliminary Technical Data ADIS16385 Rev. PrA | Page 15 of 20 DIGITAL PROCESSING CONFIGURATION Table 27. Digital Processing Registers Register Name Address Description SMPL_PRD 0x36 Sample rate control SENS_AVG 0x38 Digital filtering and range control Sample Rate The internal sampling system produces new data in the output data registers at a rate of 1024 SPS. The SMPL_PRD register in Table 28 provides two functional controls that affect sampling and register update rates. SMPL_PRD[12:8] provides a control for reducing the update rate, using an averaging filter with a decimated output. These bits provide a binomial control that divides the data rate by a factor of 2 every time this number increases by one. For example, set SMPL_PRD[12:8] = 0100 (DIN = 0xB704) to set the decimation factor to 16. This reduces the update rate to 64 SPS and the bandwidth to 31 Hz. Table 28. SMPL_PRD Bit Descriptions Bits Description (Default = 0x0001) [15:13] Not used [12:8] Average/decimation rate setting, binomial [7:1] Not used [0] Clock: 1 = internal (1024 SPS), 0 = external Input Clock Configuration SMPL_PRD[0] provides a control for synchronizing the internal sampling to an external clock source. Set GPIO_CTRL[3] = 0 (DIN = 0x0B200) and SMPL_PRD[0] = 0 (DIN = 0xB600) to enable the external clock. See Table 2 and Figure 4 for timing information. Digital Filtering The SENS_AVG register in Table 29 provides user controls for the low-pass filter. This filter contains two cascaded averaging filters that provide a Bartlett window, FIR filter response (see Figure 18). For example, set SENS_AVG[2:0] = 100 (DIN = 0xB804) to set each stage to 16 taps. When used with the default sample rate of 1024 SPS and zero decimation (SMPL_PRD[12:8] = 00000), this value reduces the sensor bandwidth to approximately 20 Hz. 0 –20 –40 –60 –80 –100 –120 –140 0.001 0.01 0.1 1 FREQUENCY ( f/fS) N = 2 N = 4 N = 16 N = 64 Figure 17. Bartlett Window, FIR Filter Frequency Response (Phase Delay = N Samples) Dynamic Range The SENS_AVG[10:8] bits provide three dynamic range settings for this gyroscope. The lower dynamic range settings (±75°/sec and ±150°/sec) limit the minimum filter tap sizes to maintain resolution. For example, set SENS_AVG[10:8] = 010 (DIN = 0xB902) for a measurement range of ±150°/sec. Because this setting can influence the filter settings, program SENS_AVG[10:8] before programming SENS_AVG[2:0] if more filtering is required. Table 29. SENS_AVG Bit Descriptions Bits Description (Default = 0x0402) [15:11] Not used [10:8] Measurement range (sensitivity) selection 100 = ±300°/sec (default condition) 010 = ±150°/sec, filter taps ≥ 4 (Bits[2:0] ≥ 0x02) 001 = ±75°/sec, filter taps ≥ 16 (Bits[2:0] ≥ 0x04) [7:3] Not used [2:0] Number of taps in each stage; value of m in N = 2m stage) (per taps of Number 2 0] : SENS_AVG[2 = = = B B B N N B ∑ = B N n B n x N 1 ) ( 1 ∑ = B N n B n x N 1 ) ( 1 ∑ = D N n D n x N 1 ) ( 1 taps of Number 2 8] : 2 SMPL_PRD[1 D = = = D D D N N D N ÷ Figure 18. Sampling and Frequency Response Block Diagram |
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