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TEA1532BT Datasheet(PDF) 9 Page - NXP Semiconductors |
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TEA1532BT Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 23 page TEA1532BT_TEA1532CT_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 18 January 2007 9 of 23 NXP Semiconductors TEA1532BT; TEA1532CT GreenChip II SMPS control IC value of Rslopecomp. Slope compensation prevents modulation of the on-time (duty cycle) while operating in FF CCM. A possible drawback of sub-harmonic oscillation can be output voltage ripple. 7.11 Minimum and maximum on-time The minimum on-time of the SMPS is determined by the Leading Edge Blinking (LEB) time (typically 400 ns). The IC limits the on-time to a maximum time, which is dependent on the mode of operation: QR mode: When the system requires an ‘on-time’ of more than 25 µs, a fault condition is assumed (e.g. CVCC removed). The IC stops switching and enters the safe restart mode. CCM: The driver duty cycle is limited to 70 %. So the maximum on-time is correlated to the oscillator time, which results in an accurate limit of the minimum input voltage of the flyback converter. 7.12 Soft start-up (pin SENSE) To prevent transformer rattle at start-up or during hiccup, the transformer peak current is slowly increased by the soft start function. This can be achieved by inserting a resistor and a capacitor between pin SENSE (pin 6) and sense resistor Rsense. An internal current source charges the capacitor to VSENSE =Istartup(soft) × Rss (about 0.5 V maximum). The start level and the time constant of the increasing primary current level can be adjusted externally by changing the values of Rss and Css. Fig 7. Slope compensation 001aaa830 CTRL −1 slope compensation current 0.63 V control detect 5.6 V 4 RCTRL Rsc I DM V sense max ) ( I startup soft ) ( R ss ×) ( – R sense --------------------------------------------------------------------------------------- = τ R ss C ss × = |
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