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TPS54310MPWPREP Datasheet(PDF) 8 Page - Texas Instruments |
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TPS54310MPWPREP Datasheet(HTML) 8 Page - Texas Instruments |
8 / 21 page APPLICATION INFORMATION RT SYNC SS/ENA VBIAS PWRGD COMP VSENSE AGND 20 19 18 17 4 3 2 1 VIN VIN VIN PH PH PH PH PH BOOT PGND PGND PGND PwrPAD 16 15 14 10 9 8 7 6 5 13 12 11 U1 TPS54310PWP C8 10 µF C7 0.047 µF L1 1.2 µH + C9 180 µF 4 V C11 1000 pF 1 2 VO GND J3 C5 3900 pF R2 3.74 k Ω R4 3.74 k Ω C4 100 pF R3 71.5 k Ω C3 0.1 µF 1 R1 10 k Ω J1 2 1 VI GND PWRGD + C2 1 Optional C6 R6 2700 pF 732 Ω R5 10 k Ω R7 49.9 Ω VIN INPUT VOLTAGE SETTING THE OUTPUT VOLTAGE FEEDBACK CIRCUIT O R5 x 0.891 R4 = V - 0.891 (1) TPS54310-EP SLVS818 – APRIL 2008 ..................................................................................................................................................................................................... www.ti.com Figure 10 shows the schematic diagram for a typical TPS54310 application. The TPS54310 (U1) can provide up to 3 A of output current at a nominal output voltage of 3.3 V. For proper thermal performance, the thermal pad under the TPS54310 integrated circuit needs to be soldered well to the printed-circuit board. Figure 10. TPS54310 Schematic The input to the circuit is a nominal 5 VDC, applied at The output voltage of the TPS54310 can be set by J1. The optional input filter (C2) is a 220-µF POSCAP feeding back a portion of the output to the VSENSE capacitor, with a maximum allowable ripple current of pin using a resistor divider network. In the application 3 A. C8 is the decoupling capacitor for the TPS54310 circuit of Figure 10, this divider network is comprised and must be located as close to the device as of resistors R5 and R4. To calculate the resistor possible. values to generate the required output voltage use Equation 1. The resistor divider network of R5 and R4 sets the output voltage for the circuit at 3.3 V. R5, along with Start with a fixed value of R5 and calculate the R2, R6, C4, C5, and C6 forms the loop compensation required R4 value. Assuming a fixed value of 10 k Ω network for the circuit. For this design, a Type 3 for R5, the following table gives the appropriate R4 topology is used. value for several common output voltages: OUTPUT VOLTAGE (V) R4 VALUE (K Ω) 1.2 28.7 1.5 14.7 1.8 9.76 2.5 5.49 3.3 3.74 8 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS54310-EP |
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