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ADT7475ARQZ Datasheet(PDF) 4 Page - ON Semiconductor |
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ADT7475ARQZ Datasheet(HTML) 4 Page - ON Semiconductor |
4 / 58 page ADT7475 http://onsemi.com 4 ELECTRICAL CHARACTERISTICS TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted. (Note 1) Parameter Conditions Min Typ Max Unit Power Supply Supply Voltage 3.0 3.3 3.6 V Supply Current, ICC Interface inactive, ADC active 1.5 3.0 mA Temperature−to−Digital Converter Local Sensor Accuracy Resolution 0°C ≤ TA ≤ 85°C −40°C ≤ TA ≤ +125°C ±0.5 0.25 ±1.5 ±2.5 °C Remote Diode Sensor Accuracy Resolution 0°C ≤ TA ≤ 85°C −40°C ≤ TA ≤ +125°C ±0.5 0.25 1.5 ±2.5 °C Remote Sensor Source Current High level Low level 180 11 mA ANALOG−TO−DIGITAL CONVERTER (INCLUDING MUX AND ATTENUATORS) Total Unadjusted Error (TUE) ±1.5 % Differential Non−linearity (DNL) 8 bits ±1 LSB Power Supply Sensitivity ±0.1 %/V Conversion Time (Voltage Input) Averaging enabled 11 ms Conversion Time (Local Temperature) Averaging enabled 12 ms Conversion Time (Remote Temperature) Averaging enabled 38 ms Total Monitoring Cycle Time Averaging enabled Averaging disabled 145 19 ms Input Resistance For VCCP channel 70 120 kW FAN RPM−TO−DIGITAL CONVERTER Accuracy 0°C ≤ TA ≤ 70°C −40°C ≤ TA ≤ +120°C ±6 ±10 % Full−Scale Count 65,535 Nominal Input RPM Fan count = 0xBFFF Fan count = 0x3FFF Fan count = 0x0438 Fan count = 0x021C 109 329 5000 10,000 RPM OPEN−DRAIN DIGITAL OUTPUTS (PWM1 TO PWM3, XTO) Current Sink, IOL 8.0 mA Output Low Voltage, VOL IOUT = −8.0 mA 0.4 V High Level Output Current, IOH VOUT = VCC 0.1 20 mA OPEN−DRAIN SERIAL DATA BUS OUTPUT (SDA) Output Low Voltage, VOL IOUT = −4.0 mA 0.4 V High Level Output Current, IOH VOUT = VCC 0.1 1.0 mA SMBus DIGITAL INPUTS (SCL, SDA) Input High Voltage, VIH 2.0 V Input Low Voltage, VIL 0.4 V Hysteresis 500 mV DIGITAL INPUT LOGIC LEVELS (TACH INPUTS) Input High Voltage, VIH Maximum input voltage 2.0 3.6 V Input Low Voltage, VIL Minimum input voltage −0.3 0.8 V Hysteresis 0.5 V p−p 1. All voltages are measured with respect to GND, unless otherwise specified. Typicals are at TA = 25°C and represent the most likely parametric norm. Logic inputs accept input high voltages of up to VMAX, even when the device is operating down to VMIN. Timing specifications are tested at logic levels of VIL = 0.8 V for a falling edge and VIH = 2.0 V for a rising edge. 2. SMBus timing specifications are guaranteed by design and are not production tested. |
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