TDA19978A_3

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Product data sheet

Rev. 03 — 16 April 2010

19 of 38

NXP Semiconductors

TDA19978A

Quad HDMI 1.3a receiver with digital processing

[1]

At 30 % activity on video port output.

[2]

In high-impedance state, the output buffer is set to repeater mode recopying the input logic state with a small current. The output current

pull-up or pull-down resistor must be lower than 18 k

Ω to have a stable output value of V

[3]

x = A, B, C or D.

[4]

5 V tolerant.

[5]

Fast-mode, 5 V tolerant.

OFF-state output leakage current

[2] -0

-

μA

10

-

100

μA

−100 -

−10

μA

-0

-

μA

Digital inputs: pins RXxC+, RXxC

−[3]

differential input voltage

150

-

1200

mV

common-mode input voltage

2.735 -

3.475

V

maximum clock frequency

205

-

-

MHz

Digital inputs: pins RXx0+, RXx0

−, RXx1+, RXx1−, RXx2+, RXx2−[3]

differential input voltage

150

-

1200

mV

common-mode input voltage

2.735 -

3.475

V

SCL clock frequency

-

-

400

kHz

capacitive load for each bus line

-

-

400

pF

capacitance for each I/O pin

-

-

10

pF

SCL clock frequency

Standard-mode

-

-

100

kHz

Fast-mode

-

-

400

kHz

capacitance for each I/O pin

-

-

10

pF

Table 10.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit