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TDA19978A Datasheet(PDF) 24 Page - NXP Semiconductors |
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TDA19978A Datasheet(HTML) 24 Page - NXP Semiconductors |
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24 / 38 page  TDA19978A_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 — 16 April 2010 24 of 38 NXP Semiconductors TDA19978A Quad HDMI 1.3a receiver with digital processing [1] Z = high-impedance; L = LOW-level; depending on the driver configuration. Table 14. Output in 10-bit video port format (mapping example 2) Signal RGB YCbCr 4:4:4 YCbCr 4:2:2 semi-planar[1] YCbCr 4:2:2 ITU-R BT.656[1] VP[29] B[11] Cb[11] Z/L Z/L Z/L Z/L Z/L Z/L VP[28] B[10] Cb[10] Z/L Z/L Z/L Z/L Z/L Z/L VP[27] B[9] Cb[9] Z/L Z/L Z/L Z/L Z/L Z/L VP[26] B[8] Cb[8] Z/L Z/L Z/L Z/L Z/L Z/L VP[25] B[7] Cb[7] Z/L Z/L Z/L Z/L Z/L Z/L VP[24] B[6] Cb[6] Z/L Z/L Z/L Z/L Z/L Z/L VP[23] B[5] Cb[5] Z/L Z/L Z/L Z/L Z/L Z/L VP[22] B[4] Cb[4] Z/L Z/L Z/L Z/L Z/L Z/L VP[21] B[3] Cb[3] Z/L Z/L Z/L Z/L Z/L Z/L VP[20] B[2] Cb[2] Z/L Z/L Z/L Z/L Z/L Z/L VP[19] G[11] Y[11] Y0[11] Y1[11] Z/L Z/L Z/L Z/L VP[18] G[10] Y[10] Y0[10] Y1[10] Z/L Z/L Z/L Z/L VP[17] G[9] Y[9] Y0[9] Y1[9] Z/L Z/L Z/L Z/L VP[16] G[8] Y[8] Y0[8] Y1[8] Z/L Z/L Z/L Z/L VP[15] G[7] Y[7] Y0[7] Y1[7] Z/L Z/L Z/L Z/L VP[14] G[6] Y[6] Y0[6] Y1[6] Z/L Z/L Z/L Z/L VP[13] G[5] Y[5] Y0[5] Y1[5] Z/L Z/L Z/L Z/L VP[12] G[4] Y[4] Y0[4] Y1[4] Z/L Z/L Z/L Z/L VP[11] G[3] Y[3] Y0[3] Y1[3] Z/L Z/L Z/L Z/L VP[10] G[2] Y[2] Y0[2] Y1[2] Z/L Z/L Z/L Z/L VP[9] R[11] Cr[11] Cb[11] Cr[11] Cb[11] Y0[11] Cr[11] Y1[11] VP[8] R[10] Cr[10] Cb[10] Cr[10] Cb[10] Y0[10] Cr[10] Y1[10] VP[7] R[9] Cr[9] Cb[9] Cr[9] Cb[9] Y0[9] Cr[9] Y1[9] VP[6] R[8] Cr[8] Cb[8] Cr[8] Cb[8] Y0[8] Cr[8] Y1[8] VP[5] R[7] Cr[7] Cb[7] Cr[7] Cb[7] Y0[7] Cr[7] Y1[7] VP[4] R[6] Cr[6] Cb[6] Cr[6] Cb[6] Y0[6] Cr[6] Y1[6] VP[3] R[5] Cr[5] Cb[5] Cr[5] Cb[5] Y0[5] Cr[5] Y1[5] VP[2] R[4] Cr[4] Cb[4] Cr[4] Cb[4] Y0[4] Cr[4] Y1[4] VP[1] R[3] Cr[3] Cb[3] Cr[3] Cb[3] Y0[3] Cr[3] Y1[3] VP[0] R[2] Cr[2] Cb[2] Cr[2] Cb[2] Y0[2] Cr[2] Y1[2] |
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