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TDA19978AHV Datasheet(PDF) 9 Page - NXP Semiconductors |
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TDA19978AHV Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 38 page TDA19978A_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 — 16 April 2010 9 of 38 NXP Semiconductors TDA19978A Quad HDMI 1.3a receiver with digital processing [1] P = power supply; G = ground; I = input; O = output and I/O = input/output. [2] Connected to the ground of the HDMI receiver (VSSH) in normal operation. 8. Functional description The TDA19978A converts digital data streams input by the HDMI sources into parallel digital data for use by media and video signal processing integrated circuits in devices for HDTV. Data streams can be decoded with or without HDCP protection. Outputs from the TDA19978A can be RGB 4:4:4, YCbCr 4:4:4, YCbCr 4:2:2 semi-planar format based on the ITU-R BT.601 standard or YCbCr 4:2:2 based on the ITU-R BT.656 format. Inputs can be both progressive and interlaced formats. The TDA19978A comprises a color space conversion block, downsampling filters and an embedded timing code function. In addition, the HDCP repeater function enables other HDMI devices to be connected to form an extended “total application”. 8.1 Software Drivers Software drivers are provided for easy configuration and use of the TDA19978A. These drivers can be integrated with a large range of processors, with or without an operating system. They control activity detection, input selection, video mode identification, color conversion, Power-down modes, HDCP and InfoFrame notification. 8.2 HDMI inputs Control of the four HDMI inputs can be automatic using activity detection or using the I2C-bus. The HDMI receiver inputs are defined by pins RXx0+, RXx0 −, RXx1+, RXx1−, RXx2+, RXx2 −, RXxC+, RXxC−, RRXx, HSCLx and HSDAx. In the pin names, x equals A, B, C or D (as applicable). 8.3 Termination resistance control The HDMI receiver input contains a termination resistance control set by an external resistor connected between pins RRXx and VDDH(3V3). In RRXx, x equals 1 for inputs A and B or 2 for inputs C and D. Typically, the characteristic impedance is 50 Ω and the default value of the external terminal control resistor is 12 k Ω ± 1 %. VSSH 135 G HDMI receiver ground VDDC(1V8) 136 P digital core supply voltage; 1.8 V VDDC(1V8) 137 P digital core supply voltage; 1.8 V HSDAC 138 I/O HDMI input/output C HDCP DDC-bus serial data HSCLC 139 I HDMI input C HDCP DDC-bus serial clock HSDAD 140 I/O HDMI input/output D HDCP DDC-bus serial data HSCLD 141 I HDMI input D HDCP DDC-bus serial clock VDDI(3V3) 142 P digital inputs supply voltage; 3.3 V RRX2 143 I HDMI inputs C and D termination resistance control VDDH(1V8) 144 P HDMI receiver supply voltage; 1.8 V Exposed die pad central G exposed die pad; connect to digital core ground (VSSC) Table 3. Pin description …continued Symbol Pin Type[1] Description |
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