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CAT93C86ZD4I-GT2C Datasheet(PDF) 3 Page - ON Semiconductor |
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CAT93C86ZD4I-GT2C Datasheet(HTML) 3 Page - ON Semiconductor |
3 / 13 page CAT93C86 (Rev. C) © 2008 SCILLC. All rights reserved 3 Doc. No. MD-1091 Rev. R Characteristics subject to change without notice PIN CAPACITANCE (1) Symbol Test Conditions Min Typ Max Units COUT Output Capacitance (DO) VOUT = 0V 5 pF CIN Input Capacitance (CS, SK, DI, ORG) VIN = 0V 5 pF POWER-UP TIMING (1)(2) Symbol Parameter Max Units tPUR Power-up to Read Operation 1 ms tPUW Power-up to Write Operation 1 ms A.C. TEST CONDITIONS Input Rise and Fall Times ≤ 50ns Input Pulse Voltages 0.4V to 2.4V 4.5V ≤ V CC ≤ 5.5V Timing Reference Voltages 0.8V, 2.0V 4.5V ≤ V CC ≤ 5.5V Input Pulse Voltages 0.2VCC to 0.7VCC 1.8V ≤ V CC ≤ 4.5V Timing Reference Voltages 0.5VCC 1.8V ≤ V CC ≤ 4.5V A.C. CHARACTERISTICS VCC = 1.8V-5.5V VCC = 2.5V-5.5V VCC = 4.5V-5.5V Symbol Parameter Test Conditions Min Max Min Max Min Max Units tCSS CS Setup Time 200 100 50 ns tCSH CS Hold Time 0 0 0 ns tDIS DI Setup Time 200 100 50 ns tDIH DI Hold Time 200 100 50 ns tPD1 Output Delay to 1 1 0.5 0.15 µs tPD0 Output Delay to 0 CL = 100pF (3) 1 0.5 0.15 µs tHZ (1) Output Delay to High-Z 400 200 100 ns tEW Program/Erase Pulse Width 5 5 5 ms tCSMIN Minimum CS Low Time 1 0.5 0.15 µs tSKHI Minimum SK High Time 1 0.5 0.15 µs tSKLOW Minimum SK Low Time 1 0.5 0.15 µs tSV Output Delay to Status Valid 1 0.5 0.1 µs SKMAX Maximum Clock Frequency DC 500 DC 1000 DC 3000 kHz Notes: (1) These parameters are tested initially and after a design or process change that affects the parameter. (2) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. (3) The input levels and timing reference points are shown in the “AC Test Conditions” table. |
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