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CAT5419YI10 Datasheet(PDF) 2 Page - ON Semiconductor

Part # CAT5419YI10
Description  Dual Digitally Programmable Potentiometers (DPP?? with 64 Taps and 2-wire Interface
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CAT5419YI10 Datasheet(HTML) 2 Page - ON Semiconductor

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CAT5419
Doc. No. MD-2115 Rev. J
2
2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
PIN DESCRIPTIONS
SCL: Serial Clock
The CAT5419 serial clock input pin is used to
clock all data transfers into or out of the device.
SDA: Serial Data
The CAT5419 bidirectional serial data pin is used
to transfer data into and out of the device. The
SDA pin is an open drain output and can be wire-
OR'd with the other open drain or open collector
outputs.
A0, A1, A2, A3: Device Address Inputs
These inputs set the device address when
addressing multiple devices. A total of sixteen
devices can be addressed on a single bus. A
match in the slave address must be made with the
address input in order to initiate communication
with the CAT5419.
RH, RL: Resistor End Points
The RH and RL pins are equivalent to the terminal
connections on a mechanical potentiometer.
RW: Wiper
The RW pins are equivalent to the wiper terminal of
a mechanical potentiometer.
WP
¯¯¯: Write Protect Input
The WP
¯¯¯ pin when tied low prevents non-volatile
writes to the data registers (change of wiper
control register is allowed) and when tied high or
left floating normal read/write operations are
allowed. See page 7, Write Protection for more
details.
DEVICE OPERATION
The CAT5419 is two resistor arrays integrated with 2wire serial interface logic, four 6-bit wiper control registers
and sixteen 6-bit, non-volatile memory data registers. Each resistor array contains 63 separate resistive elements
connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical
potentiometer (RH and RL). RH and RL are symmetrical and may be interchanged. The tap positions between and
at the ends of the series resistors are connected to the output wiper terminals (RW) by a CMOS transistor switch.
Only one tap point for each potentiometer is connected to its wiper terminal at a time and is determined by the
value of the wiper control register. Data can be read or written to the wiper control registers or the non-volatile
memory data registers via the 2-wire bus. Additional instructions allow data to be transferred between the wiper
control registers and each respective potentiometer's non-volatile data registers. Also, the device can be
instructed to operate in an "increment/decrement" mode.
Pin
SOIC
Pin
TSSOP
Name
Function
1
19
VCC
Supply Voltage
2
20
RL0
Low Reference Terminal for
Potentiometer 0
3
21
RH0
High Reference Terminal for
Potentiometer 0
4
22
RW0
Wiper Terminal for
Potentiometer 0
5
23
A2
Device Address
6
24
WP
¯¯¯
Write Protection
7
1
SDA
Serial Data Input/Output
8
2
A1
Device Address
9
3
RL1
Low Reference Terminal for
Potentiometer 1
10
4
RH1
High Reference Terminal for
Potentiometer 1
11
5
RW1
Wiper Terminal for
Potentiometer 1
12
6
GND
Ground
13
7
NC
No Connect
14
8
NC
No Connect
15
9
NC
No Connect
16
10
NC
No Connect
17
11
SCL
Bus Serial Clock
18
12
A3
Device Address
19
13
NC
No Connect
20
14
A0
Device Address, LSB
21
15
NC
No Connect
22
16
NC
No Connect
23
17
NC
No Connect
24
18
NC
No Connect


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