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MC68CK338CPV14B1 Datasheet(PDF) 8 Page - Freescale Semiconductor, Inc |
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MC68CK338CPV14B1 Datasheet(HTML) 8 Page - Freescale Semiconductor, Inc |
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8 / 133 page  MOTOROLA MC68CK338 8 MC68CK338TS/D 2.2 MCU Power Connections 2.3 MCU Driver Types NOTES: 1. HALT and BERR synchronized only if late HALT or BERR. 2. DATA[15:0] synchronized during reset only. MODCLK and QSM pins synchronized only if used as port I/O pins. PCS0/SS Bo Yes2 Yes I/O PQS3 PCS[3:1] Bo Yes2 Yes I/O PQS[6:4] RESET Bo Yes Yes — — RMC A Yes Yes I/O PE3 R/W A Yes No — — RXD — No Yes — — SCK Bo Yes2 Yes I/O PQS2 SIZ[1:0] B Yes No I/O PE[7:6] TSC — Yes Yes — — TXD Bo Yes2 Yes I/O PQS7 XFC — — — — — XRTC — — — — — XTAL — — — — — Table 3 MCU Power Connections VDDSYN Clock Synthesizer VDDE, VSSE External periphery power (source and drain) VDDI, VSSI Internal module power (source and drain) VRTC RTCSM/RAMSM standby power VSSRTCOSC Ground connection for real-time clock oscillator Table 4 MCU Output Driver Types Type Description A Output-only signals that are always driven; no external pull-up required Ao Type A output that can be operated in an open drain mode Aw Type A output with weak P-channel pull-up during reset B Three-state output that includes circuitry to pull up output before high impedance is established, to ensure rapid rise time. An external holding resistor is required to maintain logic level while the pin is in the high-impedance state. Bw Type B output with weak P-channel pull-up during reset Bo Type B output that can be operated in an open-drain mode Table 2 MCU Pin Characteristics (Continued) Pin Mnemonic Output Driver Input Synchronized Input Hysteresis Discrete I/O Port Designation Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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