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LT6656ACS6-2.048PBF Datasheet(PDF) 10 Page - Linear Technology |
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LT6656ACS6-2.048PBF Datasheet(HTML) 10 Page - Linear Technology |
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10 / 18 page  LT6656 0 6656fa Output Settling The output of the LT6656 is primarily designed to source current into a load, but is capable of sinking current to aid in output transient recovery. The output stage uses a class B architecture to minimize quiescent current and has a crossover dead band as the output transitions from sourcing to sinking current. applicaTions inForMaTion Figure 5. Output Response to 0.5VP-P Step on VIN, CL = 1µF, IL = 0 The settling time is typically less than 8ms for output loads up to 5mA, however the time required to settle when the loadisturnedofforinresponsetoaninputtransientcanbe significantly longer due to the dead band (shown in Figure 7). During this interval the output stage is neither sourcing nor sinking current so the settling time is dominated by the ability of the application circuit to discharge the output capacitor to the voltage at which the sourcing circuitry in the output stage reactivates. Larger load currents will decrease the settling time and higher output capacitance will increase the settling time. In application circuits where the LT6656 is experiencing a load step greater than 5µA, such as an ADC reference and supply implementation, the settling time will typically remain less than 8ms, regardless of the output settling from a previous load step. The settling time can be estimated by the following equation: Settling time Deadband C I V m L L OUT ≈ + 2 0 8 ( )( ) ( )( . ss V / ) The deadband is ≈7mV for the 2.5V option, is proportional to the voltage option (i.e., ≈14mV for the 5V option) and can double due to variations in processing. The graph in Figure 6 shows the settling time versus load step with no load and with a constant 2µA load applied. Note the settling time can be longer with load steps that are not large enough to activate the sinking side of the output stage. 2.7V 2.5V VOUT 2.3V 3.25V VIN 2.75V 5ms/DIV 6656 F05 Figure 6. Output Settling Time to 0.05% vs Load Step LOAD STEP (mA) 6656 F06 0.001 1 10 0.1 0.01 2.5V OPTION VIN = 3V CL = 1µF ∆IL = LOAD STEP TO 2µA ∆IL = LOAD STEP TO ZERO ∆IL = ZERO TO LOAD STEP 30 25 20 15 10 5 0 2.52V 2.50V VOUT 2.48V 1mA IOUT 2mA 5ms/DIV 6656 F04 2.52V 2.50V VOUT 2.48V 0µA IOUT 100µA 5ms/DIV 6656 F03 Figure 3. Transient Response, 0µA to 100µA Load Step (R2 = 24.9k, R1 = Open) Figure 4. Transient Response, 1mA to 2mA Load Step (R1 = R2 = 2.49k) |
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