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CMPWR101R Datasheet(PDF) 9 Page - ON Semiconductor |
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CMPWR101R Datasheet(HTML) 9 Page - ON Semiconductor |
9 / 12 page CMPWR101 Rev. 3 | Page 9 of 12 | www.onsemi.com Performance Information (cont’d) CMPWR101 Typical Thermal Characteristics The overall junction to ambient thermal resistance ( θ JA) for device power dissipation (PD) consists primarily of two paths in series. The first path is the junction to the case ( θ JC) which is defined by the package style, and the second path is case to ambient ( θ CA) thermal resistance which is dependent on board layout. The final operating junction temperature for any set of conditions can be estimated by the following thermal equation: T JUNC = T AMB + PD (θJC) + PD (θCA) = T AMB + PD (θJA) The CMPWR101 uses a standard SOIC package. When this package is mounted on a double-sided printed circuit board with two square inches of copper allocated for "heat spreading", the resulting θJA is 85°C/W. Based on a maximum power dissipation of 0.43W (1.7V x 250mA) with an ambient of 70°C, the resulting junction temperature will be: T JUNC = TAMB + PD (θJA) = 70°C + 0.43W (80°C/W) = 70°C + 37°C = 103°C Thermal characteristics were measured using a double-sided board with two square inches of copper area connected to the GND pin for "heat spreading". Measurements showing performance up to junction temperature of 125°C were performed under light load conditions (5mA). This allows the ambient temperature to be representative of the internal junction temperature. Note: The use of multi-layer board construction with separate ground and power planes will further enhance the overall thermal performance. In the event of no copper area being dedicated for heat spreading, a multi-layer board construction, using only the minimum size pad layout, will provide the CMPWR101 with an overall θ JA of 100°C/W which allows up to 500mW to be safely dissipated. |
Similar Part No. - CMPWR101R |
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Similar Description - CMPWR101R |
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