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MC74HC10ADR2G Datasheet(PDF) 1 Page - ON Semiconductor |
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MC74HC10ADR2G Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2009 December, 2009 − Rev. 1 1 Publication Order Number: MC74HC10A/D MC74HC10A Triple 3-Input NAND Gate High−Performance Silicon−Gate CMOS The MC74HC10A is identical in pinout to the LS10. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Features • Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS and TTL • Operating Voltage Range: 2 to 6 V • Low Input Current: 1 mA • High Noise Immunity Characteristic of CMOS Devices • In Compliance With the Requirements Defined JEDEC Standard No. 7 A • Chip Complexity: 36 FETs or 9 Equivalent Gates • Pb−Free Packages are Available LOGIC DIAGRAM PIN 14 = VCC PIN 7 = GND Y = ABC A1 B1 C1 A2 B2 C2 A3 B3 C3 Y1 1 2 13 Y2 Y3 3 4 5 9 10 11 12 6 8 PIN ASSIGNMENT 11 12 13 14 8 9 10 5 4 3 2 1 7 6 B3 C3 Y1 C1 VCC Y3 A3 B2 A2 B1 A1 GND Y2 C2 MARKING DIAGRAMS A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb−Free Package L L H H L H L H FUNCTION TABLE Inputs Output AB H H H L Y See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ORDERING INFORMATION http://onsemi.com TSSOP−14 DT SUFFIX CASE 948G 14 1 SOIC−14 D SUFFIX CASE 751A 14 1 HC10AG AWLYWW 1 14 HC 10A ALYWG G 1 14 14 1 PDIP−14 N SUFFIX CASE 646 MC74HC10AN AWLYYWWG 1 14 (Note: Microdot may be in either location) |
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