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SN74LVC1G04DRYRG4 Datasheet(PDF) 2 Page - Texas Instruments |
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SN74LVC1G04DRYRG4 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 19 page www.ti.com A Y 2 4 A Y 1 3 SN74LVC1G04 SINGLE INVERTER GATE SCES214U – APRIL 1999 – REVISED FEBRUARY 2007 ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2) NanoFree™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP SN74LVC1G04YZPR _ _ _ CC_ (Pb-free) NanoFree™ – WCSP (DSBGA) 0.23-mm Large Bump – YZV SN74LVC1G04YZVR _ _ _ CC_ (Pb-free) SN74LVC1G04DRYR SON – DRY Reel of 5000 CC_ –40 °C to 85°C SN74LVC1G04DRYRG4 Reel of 3000 SN74LVC1G04DBVR SOT (SOT-23) – DBV C04_ Reel of 250 SN74LVC1G04DBVT Reel of 3000 SN74LVC1G04DCKR SOT (SC-70) – DCK Reel of 250 SN74LVC1G04DCKT CC_ SOT (SOT-553) – DRL Reel of 4000 SN74LVC1G04DRLR (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. (2) DBV/DCK/DRL/DRY: The actual top-side marking has one additional character that designates the assembly/test site. YZP/YZV: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). FUNCTION TABLE INPUT OUTPUT A Y H L L H LOGIC DIAGRAM (POSITIVE LOGIC) (DBV, DCK, DRL, DRY, AND YZP PACKAGE) LOGIC DIAGRAM (POSITIVE LOGIC) (YZV PACKAGE) 2 Submit Documentation Feedback |
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