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TCA6424 Datasheet(PDF) 2 Page - Texas Instruments |
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TCA6424 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 29 page TCA6424 SCPS175A – NOVEMBER 2007 – REVISED NOVEMBER 2009 www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) The TCA6424 consists of three 8-bit Configuration (input or output selection), Input, Output, and Polarity Inversion (active high) registers. At power on, the I/Os are configured as inputs. However, the system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding input or output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master. The system master can reset the TCA6424 in the event of a timeout or other improper operation by asserting a low in the RESET input. The power-on reset puts the registers in their default state and initializes the I2C/SMBus state machine. The RESET pin causes the same reset/initialization to occur without depowering the part. The TCA6424 open-drain interrupt (INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C bus. Thus, the TCA6424 can remain a simple slave device. The device P-port outputs have high-current sink capabilities for directly driving LEDs while consuming low device current. One hardware pin (ADDR) can be used to program and vary the fixed I2C address and allow up to two devices to share the same I2C bus or SMBus. ORDERING INFORMATION TA PACKAGE(1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING –40°C to 85°C QFN – RGJ Reel of 3000 TCA6424RGJR PH424 (1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Table 1. TERMINAL FUNCTIONS TERMINAL DESCRIPTION PIN NO. NAME 1 P00 P-port input/output (push-pull design structure). At power on, P00 is configured as an input. 2 P01 P-port input/output (push-pull design structure). At power on, P01 is configured as an input. 3 P02 P-port input/output (push-pull design structure). At power on, P02 is configured as an input. 4 P03 P-port input/output (push-pull design structure). At power on, P03 is configured as an input. 5 P04 P-port input/output (push-pull design structure). At power on, P04 is configured as an input. 6 P05 P-port input/output (push-pull design structure). At power on, P05 is configured as an input. 7 P06 P-port input/output (push-pull design structure). At power on, P06 is configured as an input. 8 P07 P-port input/output (push-pull design structure). At power on, P07 is configured as an input. 9 P10 P-port input/output (push-pull design structure). At power on, P10 is configured as an input. 10 P11 P-port input/output (push-pull design structure). At power on, P11 is configured as an input. 11 P12 P-port input/output (push-pull design structure). At power on, P12 is configured as an input. 12 P13 P-port input/output (push-pull design structure). At power on, P13 is configured as an input. 13 P14 P-port input/output (push-pull design structure). At power on, P14 is configured as an input. 14 P15 P-port input/output (push-pull design structure). At power on, P15 is configured as an input. 15 P16 P-port input/output (push-pull design structure). At power on, P16 is configured as an input. 16 P17 P-port input/output (push-pull design structure). At power on, P17 is configured as an input. 17 P20 P-port input/output (push-pull design structure). At power on, P20 is configured as an input. 18 P21 P-port input/output (push-pull design structure). At power on, P21 is configured as an input. 19 P22 P-port input/output (push-pull design structure). At power on, P22 is configured as an input. 20 P23 P-port input/output (push-pull design structure). At power on, P23 is configured as an input. 21 P24 P-port input/output (push-pull design structure). At power on, P24 is configured as an input. 2 Submit Documentation Feedback Copyright © 2007–2009, Texas Instruments Incorporated Product Folder Link(s): TCA6424 |
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