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TL16C550D Datasheet(PDF) 2 Page - Texas Instruments |
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TL16C550D Datasheet(HTML) 2 Page - Texas Instruments |
2 / 54 page NC - No internal connection NC NC RD1 V SS WR1 XOUT XIN NC 16 15 14 13 12 11 10 9 25 26 27 28 29 30 31 32 DSR DCD RI V CC D0 D1 D2 D3 RHB PACKAGE (TOP VIEW) 23 22 21 20 19 24 18 17 2 3 4 5 6 7 8 1 NC - No internal connection 14 15 NC MR OUT1 DTR RTS OUT2 INTRPT RXRDY A0 A1 A2 NC 36 35 34 33 32 31 30 29 28 27 26 25 16 1 2 3 4 5 6 7 8 9 10 11 12 NC D5 D6 D7 RCLK NC SIN SOUT CS0 CS1 CS2 BAUDOUT 17 18 19 20 PT/PFB PACKAGE (TOP VIEW) 47 46 45 44 43 48 42 40 39 38 41 21 22 23 24 37 13 A ZQS PACKAGE (TOP VIEW) 1 2 3 4 5 B C D E TL16C550D ,, TL16C550DI SLLS597E – APRIL 2004 – REVISED DECEMBER 2008 .................................................................................................................................................. www.ti.com The TL16C550D and TL16C550DI perform serial-to-parallel conversions on data received from a peripheral device or modem and parallel-to-serial conversion on data received from its CPU. The CPU can read the ACE status at any time. The ACE includes complete modem control capability and a processor interrupt system that can be tailored to minimize software management of the communications link. Both the TL16C550D and the TL16C550DI ACE include a programmable baud rate generator capable of dividing a reference clock by divisors from 1 to 65535 and producing a 16× reference clock for the internal transmitter logic. Provisions are included to use this 16× clock for the receiver logic. The ACE accommodates up to a 1.5-Mbaud serial rate (24-MHz input clock) so that a bit time is 667 ns and a typical character time is 6.7 µs (start bit, 8 data bits, stop bit). Two of the TL16C450 terminal functions on the TL16C550D and the TL16C550DI have been changed to TXRDY and RXRDY, which provide signaling to a DMA controller. The TL16C550D is being made available in a reduced pin count package, the 32-pin RHB package. This is accomplished by eliminating some signals that are not required for some applications. These include the CS0, CS1, ADS, RD2, WR2, and RCLK input signals and the DDIS, TXRDY, RXRDY, OUT1, OUT2, and BAUDOUT output signals. There is an internal connection between BAUDOUT and RCLK. All of the functionality of the TL16C550D is maintained in the RHB package. TERMINAL ASSIGNMENTS (24-Ball ZQS Package) (continued) (24-Ball ZQS Package) 1 2 3 4 5 A D5 D4 D2 D0 VCC B D7 D3 D1 MR C SIN SOUT D6 CTS RTS D CS2 WR1 RD1 INTRPT A0 E XIN XOUT VSS A2 A1 TERMINAL ASSIGNMENTS 2 Submit Documentation Feedback Copyright © 2004–2008, Texas Instruments Incorporated Product Folder Link(s): TL16C550D TL16C550DI |
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