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LM3S8733-EQR25-A2T Datasheet(PDF) 5 Page - Texas Instruments |
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LM3S8733-EQR25-A2T Datasheet(HTML) 5 Page - Texas Instruments |
5 / 616 page 10 General-Purpose Timers ...................................................................................... 222 10.1 Block Diagram ............................................................................................................ 223 10.2 Functional Description ................................................................................................. 224 10.2.1 GPTM Reset Conditions .............................................................................................. 224 10.2.2 32-Bit Timer Operating Modes ...................................................................................... 224 10.2.3 16-Bit Timer Operating Modes ...................................................................................... 225 10.3 Initialization and Configuration ..................................................................................... 229 10.3.1 32-Bit One-Shot/Periodic Timer Mode ........................................................................... 229 10.3.2 32-Bit Real-Time Clock (RTC) Mode ............................................................................. 230 10.3.3 16-Bit One-Shot/Periodic Timer Mode ........................................................................... 230 10.3.4 16-Bit Input Edge Count Mode ..................................................................................... 231 10.3.5 16-Bit Input Edge Timing Mode .................................................................................... 231 10.3.6 16-Bit PWM Mode ....................................................................................................... 232 10.4 Register Map .............................................................................................................. 232 10.5 Register Descriptions .................................................................................................. 233 11 Watchdog Timer ................................................................................................... 258 11.1 Block Diagram ............................................................................................................ 259 11.2 Functional Description ................................................................................................. 259 11.3 Initialization and Configuration ..................................................................................... 260 11.4 Register Map .............................................................................................................. 260 11.5 Register Descriptions .................................................................................................. 261 12 Analog-to-Digital Converter (ADC) ..................................................................... 282 12.1 Block Diagram ............................................................................................................ 282 12.2 Functional Description ................................................................................................. 283 12.2.1 Sample Sequencers .................................................................................................... 283 12.2.2 Module Control ............................................................................................................ 284 12.2.3 Hardware Sample Averaging Circuit ............................................................................. 285 12.2.4 Analog-to-Digital Converter .......................................................................................... 285 12.2.5 Differential Sampling ................................................................................................... 285 12.2.6 Test Modes ................................................................................................................. 287 12.2.7 Internal Temperature Sensor ........................................................................................ 288 12.3 Initialization and Configuration ..................................................................................... 288 12.3.1 Module Initialization ..................................................................................................... 288 12.3.2 Sample Sequencer Configuration ................................................................................. 289 12.4 Register Map .............................................................................................................. 289 12.5 Register Descriptions .................................................................................................. 290 13 Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 318 13.1 Block Diagram ............................................................................................................ 319 13.2 Functional Description ................................................................................................. 319 13.2.1 Transmit/Receive Logic ............................................................................................... 319 13.2.2 Baud-Rate Generation ................................................................................................. 320 13.2.3 Data Transmission ...................................................................................................... 321 13.2.4 Serial IR (SIR) ............................................................................................................. 321 13.2.5 FIFO Operation ........................................................................................................... 322 13.2.6 Interrupts .................................................................................................................... 322 13.2.7 Loopback Operation .................................................................................................... 323 13.2.8 IrDA SIR block ............................................................................................................ 323 13.3 Initialization and Configuration ..................................................................................... 323 5 June 22, 2010 Texas Instruments-Production Data Stellaris® LM3S8733 Microcontroller |
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