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LM3S8530-IQN50-C1 Datasheet(PDF) 6 Page - Texas Instruments

Part # LM3S8530-IQN50-C1
Description  Stellaris짰 LM3S8530 Microcontroller
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM3S8530-IQN50-C1 Datasheet(HTML) 6 Page - Texas Instruments

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14.2.7 Receiving a Data Frame .............................................................................................. 370
14.2.8 Receiving a Remote Frame .......................................................................................... 370
14.2.9 Receive/Transmit Priority ............................................................................................. 371
14.2.10 Configuring a Receive Message Object ........................................................................ 371
14.2.11 Handling of Received Message Objects ........................................................................ 372
14.2.12 Handling of Interrupts .................................................................................................. 375
14.2.13 Test Mode ................................................................................................................... 375
14.2.14 Bit Timing Configuration Error Considerations ............................................................... 377
14.2.15 Bit Time and Bit Rate ................................................................................................... 377
14.2.16 Calculating the Bit Timing Parameters .......................................................................... 379
14.3
Register Map .............................................................................................................. 382
14.4
CAN Register Descriptions .......................................................................................... 384
15
Ethernet Controller .............................................................................................. 412
15.1
Block Diagram ............................................................................................................ 412
15.2
Functional Description ................................................................................................. 413
15.2.1 MAC Operation ........................................................................................................... 413
15.2.2 Internal MII Operation .................................................................................................. 417
15.2.3 PHY Operation ............................................................................................................ 417
15.2.4 Interrupts .................................................................................................................... 418
15.3
Initialization and Configuration ..................................................................................... 419
15.3.1 Hardware Configuration ............................................................................................... 419
15.3.2 Software Configuration ................................................................................................ 420
15.4
Ethernet Register Map ................................................................................................. 420
15.5
Ethernet MAC Register Descriptions ............................................................................. 422
15.6
MII Management Register Descriptions ......................................................................... 440
16
Pin Diagram .......................................................................................................... 459
17
Signal Tables ........................................................................................................ 461
17.1
100-Pin LQFP Package Pin Tables ............................................................................... 461
17.2
108-Pin BGA Package Pin Tables ................................................................................ 471
17.3
Connections for Unused Signals ................................................................................... 482
18
Operating Characteristics ................................................................................... 484
19
Electrical Characteristics .................................................................................... 485
19.1
DC Characteristics ...................................................................................................... 485
19.1.1 Maximum Ratings ....................................................................................................... 485
19.1.2 Recommended DC Operating Conditions ...................................................................... 485
19.1.3 On-Chip Low Drop-Out (LDO) Regulator Characteristics ................................................ 486
19.1.4 GPIO Module Characteristics ....................................................................................... 486
19.1.5 Power Specifications ................................................................................................... 486
19.1.6 Flash Memory Characteristics ...................................................................................... 487
19.2
AC Characteristics ....................................................................................................... 488
19.2.1 Load Conditions .......................................................................................................... 488
19.2.2 Clocks ........................................................................................................................ 488
19.2.3 JTAG and Boundary Scan ............................................................................................ 489
19.2.4 Reset ......................................................................................................................... 491
19.2.5 Sleep Modes ............................................................................................................... 493
19.2.6 General-Purpose I/O (GPIO) ........................................................................................ 493
19.2.7 Synchronous Serial Interface (SSI) ............................................................................... 493
June 22, 2010
6
Texas Instruments-Production Data
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